LTC2970-1_15 Datasheet, PDF (27/38 Pages) Linear Technology – Dual I2C Power Supply Monitor and Margining Controller

LTC2970/LTC2970-1
Operation
Rules:
See “Generating and Monitoring Instantaneous Faults”.
18. General Purpose Input/Output Pins
The GPIO_0 and GPIO_1 may be used to: (1) monitor
instantaneous faults (see “Generating and Monitoring
Instantaneous faults”); (2) control switcher run/start pins
during tracking (see “Tracking Power Supplies Overview”);
or (3) provide general purpose input/output pins.
Procedure:
To program GPIO_n as an open drain output set Io_cfg_n
= 2’b10. The value written to lo_gpio_n will be output
over GPIO_n.
To program GPIO_n as an input set Io_cfg_n = 2’b11. The
value of GPIO_n may now be read through lo_gpio_n.
Rules:
The power on reset configurations for GPIO_0 and GPIO_1
are output pins with a value equal to the complement of
the GPIO_CFG level.
19. Advanced Development Features
The internal ADC may be disabled with the ADC result reg-
isters accepting written I²C data. This feature allows faults
to be generated for diagnostic purposes, without having
to generate an actual overvoltage or undervoltage event.
Procedure:
Set IO(Io_i2c_adc_wen) high to enable ADC result register
writes and disable internal ADC updates.
Rules:
Io_i2c_adc_wen must be clear for normal operation.
Applications Information
Margining DC/DC Converters with External Feedback
Resistors
Figure 1 shows a typical application circuit for margining
a power supply with an external feedback network. The
V_{IN0_AP} and V_{IN0_AM} differential inputs sense the load
voltage directly, and differential inputs V_{IN0_BP} and V_{IN0_BM}
are connected across load current sense resistor R50. A
correction voltage is developed at the I_OUT0 pin by sourcing
IDAC0’s current into resistor R40. R40 is Kelvin connected
to the point-of-load GND in order to isolate V_IOUT0 from
ground bounce due to load current changes. V_IOUT0 is
replicated at V_OUT0 by an on-chip, unity-gain voltage buffer.
V_OUT0 is then connected to the feedback node of the power
supply through resistor R30. The feedback node can be
isolated from the DAC’s correction voltage by placing the
V_OUT0 pin in high-impedance mode. Since the GPIO_CFG
pin is pulled-up to V_DD, the LTC2970’s GPIO_0 pin will
automatically hold the power supply’s RUN/SS pin low
after power-up until the I²C interface releases it.
8V TO 15V
V_IN IN
OUT
I⁺
I^–
DC/DC
CONVERTER
RUN/SS FB
GND ^SGND
R50
R30
R20
+
LOAD V_DC0
R10
–
V_IN
V_DD
1/2 LTC2970
V_{IN0_BP}
GPIO_CFG
V_{IN0_BM}
V_OUT0
V_{IN0_AP}
ALERT
SCL
SDA
I_OUT0
R40
GPIO_0
V_{IN0_AM}
REF
GND ASEL0 ASEL1
0.1µF
0.1µF
I²C BUS
0.1µF
29701 F01
Figure 1. Typical LTC2970 Application Circuit for
DC/DC Converters with External Feedback Resistors
For more information www.linear.com/LTC2970
29701fd
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