LTC1708-PG_15 Datasheet, PDF (26/32 Pages) Linear Technology – Dual Adjustable 5-Bit VID High Efficiency, 2-Phase Current Mode Synchronous Buck DC/DC Controller

LTC1708-PG
APPLICATIO S I FOR ATIO
Design Example
As a design example for one channel, assume V_IN =
12V(nominal), V_IN = 22V(max), V_OUT = 1.6V, I_MAX = 14A,
and f = 300kHz, R_SENSE can immediately be calculated:
R_SENSE = 50mV/14A ≈ 0.0035Ω → 0.003Ω
Tie the FREQSET pin to the INTV_CC pin for 300kHz opera-
tion, or use a resistive divider from INTV_CC according to
Figure 5 to reduce the operating frequency.
Assume a 1µH inductor and check the actual value of the
ripple current. The following equation is used:
∆I_L
=
V_OUT
(f)(L)

^1–
V_OUT
V_IN


The highest value of the ripple current occurs at the
maximum input voltage:
∆I_L
=
300k1H.6zV(1µH) ^{ 1–}
1.6V ^
22V 
=
4.95A
The ripple current is 35% of maximum output current.
Increasing the ripple current will also help ensure that the
minimum on-time of 200ns is not violated. The minimum
on-time occurs at maximum V_IN:
t_ON(MIN)
=
V_OUT
V_IN(MAX)f
=
1.6V
22V(300kHz)
=
242ns
Since the output voltage is below 2.4V the output resistive
divider will need to be sized to not only set the output
voltage but also to absorb the SENSE pins current.
R1_(MAX)
=

24k_
0.8V
2.4V – V_OUT


=

24K_
0.8V ^
2.4V – 1.6V
=
24k
Choosing 1% resistors; R1 = R2 = 20k yields an output
voltage of 1.600V. If the VID section of the LTC1708-PG is
used, R1 will range from a value of 6.6k to 64k. If the forced
continuous mode is not selected and the programmed
26
voltage is less than 1.4V with no external load, it is
necessary to preload the output in order to prevent the
current comparator input bias current from causing the
output voltage to rise above the designed level. A 16k
preload resistor will prevent this from happening for all
programmed output voltages down to the minimum 0.925V
level.
The top driver output resistance at the MOSFET threshold
is approximately 4Ω. The power dissipation on the topside
MOSFET can be easily estimated. Choosing a International
Rectifier IRF7809/IRF7811 combination results in; R_DS(ON)
= 0.012Ω, C_MILLER = 4nC/16V =250pF. At maximum input
voltage with T(estimated) = 50°C:
( ) [ ] ^PMAIN
=
1.6V
22V
14
2
1+ (0.005)(50°C – 25°C)
( ) ( ) ( )( )( ) ^0.012Ω
+
22
2  _14A
 2 
4Ω
250pF
300kHz
= 1.2W
A short-circuit to ground will result in a folded back current
of:
I_SC
=
25mV
0.003Ω
+
1^
2 _
200ns(22V)^
1µH _
=
10.5A
with a typical value of R_DS(ON) and δ= (0.005/°C)(20) = 0.1
for an IRF7809. The resulting power dissipated in the
bottom MOSFET is:
( ) ( )( ) ^PSYNC
=
22V – 1.6V
22V
10.5A
2
1.1
0.009Ω
= 1W
which is less than full-load conditions.
C_IN is chosen for an RMS current rating of at least 5A at
temperature assuming only this channel is on. C_OUT is
chosen with an ESR of 0.01Ω for low output ripple. The
output ripple in continuous mode will be highest at the
maximum input voltage. The output voltage ripple due to
ESR is approximately:
V_ORIPPLE = R_{ESR(∆IL)} = 0.01Ω(4.95A) = 50mV_P–P
1708f