LTC2163_15 Datasheet, PDF (25/36 Pages) Linear Technology – 16-Bit, 125/105/80Msps Low Power ADCs

LTC2165/LTC2164/LTC2163
Applications Information
DATA FORMAT
Table 1 shows the relationship between the analog input
voltage, the digital data output bits and the overflow bit.
By default the output data format is offset binary. The 2’s
complement format can be selected by serially program-
ming mode control register A4.
Digital Output Randomizer
Interference from the A/D digital outputs is sometimes
unavoidable. Digital interference may be from capacitive or
inductive coupling or coupling through the ground plane.
Even a tiny coupling factor can cause unwanted tones
in the ADC output spectrum. By randomizing the digital
output before it is transmitted off chip, these unwanted
tones can be randomized which reduces the unwanted
tone amplitude.
The digital output is randomized by applying an exclusive-
OR logic operation between the LSB and all other data
output bits. To decode, the reverse operation is applied
—an exclusive-OR operation is applied between the LSB
and all other bits. The LSB, OF and CLKOUT outputs are
not affected. The output randomizer is enabled by serially
programming mode control register A4.
CLKOUT
OF
D15
D14
D2
RANDOMIZER
ON
D1
CLKOUT
OF
D15/D0
D14/D0
•
•
•
D2/D0
D1/D0
PC BOARD
CLKOUT FPGA
OF
D13/D0
LTC2165
D12/D0
D2/D0
D1/D0
D13
D12
•
•
•
D2
D1
D0
D0
2165 F16
Figure 16. Unrandomizing a Randomized Digital Output Signal
Alternate Bit Polarity
Another feature that reduces digital feedback on the circuit
board is the alternate bit polarity mode. When this mode is
enabled, all of the odd bits (D1, D3, D5, D7, D9, D11, D13,
D15) are inverted before the output buffers. The even bits
(D0, D2, D4, D6, D8, D10, D12, D14), OF and CLKOUT are
not affected. This can reduce digital currents in the circuit
board ground plane and reduce digital noise, particularly
for very small analog input signals.
When there is a very small signal at the input of the A/D
that is centered around mid-scale, the digital outputs toggle
between mostly 1’s and mostly 0’s. This simultaneous
switching of most of the bits will cause large currents in the
ground plane. By inverting every other bit, the alternate bit
polarity mode makes half of the bits transition high while
half of the bits transition low. This cancels current flow in
the ground plane, reducing the digital noise.
D0
D0
2165 F15
Figure 15. Functional Equivalent of Digital Output Randomizer
216543f
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