LTC3612_15 Datasheet, PDF (24/30 Pages) Linear Technology – 3A, 4MHz Monolithic Synchronous Step-Down DC/DC Converter

LTC3612
Applications Information
C_OUT will be selected based on the ESR that is required to
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. For this design, a
68µF (or 47µF plus 22µF) ceramic capacitor is used with
a X5R or X7R dielectric.
C_IN should be sized for a maximum current rating of:
I_RMS
=
3A
•
1.8V
3.6V
•


3.6V
1.8V
– 1^{}
=
1.5A_RMS
Decoupling the PV_IN with two 22µF capacitors, is adequate
for most applications.
If we set R2 = 196k, the value of R1 can now be determined
by solving the following equation.
R1
=
196k
•


1.8V
0.6V
−
1^{}
A value of 392k will be selected for R1.
Finally, define the soft start-up time choosing the proper
value for the capacitor and the resistor connected to TRACK/
SS. If we set minimum t_SS = 5ms and a resistor of 2M,
the following equation can be solved with the maximum
SV_IN = 5.5V :
C_SS
=
2M •In^{}
5ms
5.5V 
5.5V – 0.6V ^
=
21.6nF
The standard value of 22nF guarantees the minimum soft-
start up time of 5ms.
Figure 1 shows the schematic for this design example.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3612:
1. A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the SGND pin at one point which is then connected
to the PGND pin close to the LTC3612.
2. Connect the (+) terminal of the input capacitor(s), C_IN,
as close as possible to the PV_IN pin, and the (–) terminal
as close as possible to the exposed pad, PGND. This
capacitor provides the AC current into the internal power
MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small-signal nodes.
4. Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
power components. Connect the copper areas to PGND
(exposed pad) for best performance.
5. Connect the V_FB pin directly to the feedback resistors.
The resistor divider must be connected between V_OUT
and SGND.
3612fc
24
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