LTC1735 Datasheet, PDF (23/32 Pages) Linear Technology – High Efficiency Synchronous Step-Down Switching Regulator

LTC1735
APPLICATIO S I FOR ATIO
At full load current:
V_ITH(MAX)
=

^15A
+
5A_P−P
2


•

0.084V/A_

+
0.3V
= 1.77V
At minimum load current:
V_ITH(MIN)
=

 ^0.2A
+
2A_P−P
2


•

0.084V/A_

+
0.3V
= 0.40V
In this circuit, V_ITH changes from 0.40V at light load to
1.77V at full load, a 1.37V change. Notice that ∆I_L, the
peak-to-peak inductor current, changes from light load to
full load. Increasing the DC inductor current decreases the
permeability of the inductor core material, which de-
creases the inductance and increases ∆I_L. The amount of
inductance change is a function of the inductor design.
To create the ±30mV input offset, the gain of the error
amplifier must be limited. The desired gain is:
A_V
=
Input
∆V_ITH
Offset
Error
=
1.37V
2(0.03V)
=
22.8
Connecting a resistor to the output of the transconductance
error amplifier will limit the voltage gain. The value of this
resistor is:
R_ITH
=
Error
A_V
Amplifier
g_m
=
22.8
1.3ms
=
17.54k
To center the output voltage variation, V_ITH must be
centered so that no I_TH pin current flows when the output
voltage is nominal. V_ITH(NOM) is the average voltage be-
tween V_ITH at maximum output current and minimum
output current:
V_ITH(NOM)
=
V_ITH(MAX) –
2
V_ITH(MIN)
+
V_ITH(MIN)
= ^{1.77V – 0.40V} + 0.40V = 1.085V
2
The Thevenin equivalent of the gain limiting resistance
value of 17.54k is made up of a resistor R4 that sources
current into the I_TH pin and resistor R1 that sinks current
to SGND.
To calculate the resistor values, first determine the ratio
between them:
k = ^{VINTVCC – VITH(NOM)} = ^{5.2V – 1.085V} = 3.79
V_ITH(NOM)
1.085V
V_INTVCC is equal to V_EXTVCC or 5.2V if EXTV_CC is not used.
Resistor R4 is:
R4 = (k + 1) • R_ITH = (3.79 + 1) • 17.54 = 84.0k
Resistor R1 is:
R1= ^{(k + 1) • RITH} = ^{(3.79 + 1) • 17.54k} = 22.17k
k
3.79
Unfortunately, PCB noise can add to the voltage developed
across the sense resistor, R5, causing the I_TH pin voltage
to be slightly higher than calculated for a given output
current. The amount of noise is proportional to the output
current level. This PCB noise does not present a serious
problem but it does change the effective value of R5 so the
calculated values of R1 and R4 may need to be adjusted to
achieve the required results. Since PCB noise is a function
of the layout, it will be the same on all boards with the same
layout.
Figures 9 and 10 show the transient response before and
after active voltage positioning is implemented. Notice
that active voltage positioning reduced the transient re-
sponse from almost 200mV_P-P to a little over 100mV_P-P.
Refer to Design Solutions 10 for more information about
active voltage positioning.
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