LT1956EGN Datasheet, PDF (22/28 Pages) Linear Technology – High Voltage, 1.5A, 500kHz Step-Down

LT1956/LT1956-5
APPLICATIO S I FOR ATIO
LT1956
CURRENT MODE
POWER STAGE
g_m = 2mho
SW
ERROR
AMPLIFIER
g_m =
2000µmho
R_O
200k
FB
1.22V
GND
V_C
R_C
C_F
C_C
C_FB R1
R_LOAD
R2
OUTPUT
TANTALUM CERAMIC
ESR
ESL
+
C1
C1
1956 F10
Figure 10. Model for Loop Response
80
180
60
150
GAIN
40
120
20
90
PHASE
0
60
–20
30
–40
0
10
100
1k
10k 100k 1M
FREQUENCY (Hz)
1956 F11
V_IN = 12V
V_OUT = 5V
I_LOAD = 500mA
C_OUT = 100µF, 10V, 0.1Ω
R_C = 2.2k
C_C = 22nF
C_F = 220pF
Figure 11. Overall Loop Response
oscillations. If needed, an additional capacitor (C_F) can be
added across the R_C/C_C network from the V_C pin to ground
to further suppress V_C ripple voltage.
With a tantalum output capacitor, the LT1956 already
includes a resistor (R_C) and filter capacitor (C_F) at the V_C
pin (see Figures 10 and 11) to compensate the loop over
the entire V_IN range (to allow for stable pulse skipping for
high V_IN-to-V_OUT ratios ≥ 4). A ceramic output capacitor
can still be used with a simple adjustment to the resistor
R_C for stable operation (see Ceramic Capacitors section
for stabilizing LT1956). If additional phase margin is
required, a capacitor (C_FB) can be inserted between the
output and FB pin but care must be taken for high output
voltage applications. Sudden shorts to the output can
create unacceptably large negative transients on the FB
pin.
For V_IN-to-V_OUT ratios < 4, higher loop bandwidths are
possible by readjusting the frequency compensation com-
ponents at the V_C pin.
When checking loop stability, the circuit should be oper-
ated over the application’s full voltage, current and tem-
perature range. Proper loop compensation may be obtained
by empirical methods as described in Application Notes 19
and 76.
CONVERTER WITH BACKUP OUTPUT REGULATOR
In systems with a primary and backup supply, for ex-
ample, a battery powered device with a wall adapter input,
the output of the LT1956 can be held up by the backup
supply with the LT1956 input disconnected. In this condi-
tion, the SW pin will source current into the V_IN pin. If the
SHDN pin is held at ground, only the shut down current of
25µA will be pulled via the SW pin from the second supply.
With the SHDN pin floating, the LT1956 will consume its
quiescent operating current of 1.5mA. The V_IN pin will also
source current to any other components connected to the
input line. If this load is greater than 10mA or the input
could be shorted to ground, a series Schottky diode must
be added, as shown in Figure 12. With these safeguards,
the output can be held at voltages up to the V_IN absolute
maximum rating.
BUCK CONVERTER WITH ADJUSTABLE SOFT-START
Large capacitive loads or high input voltages can cause
high input currents at start-up. Figure 13 shows a circuit
that limits the dv/dt of the output at start-up, controlling
the capacitor charge rate. The buck converter is a typical
configuration with the addition of R3, R4, C_SS and Q1.
As the output starts to rise, Q1 turns on, regulating switch
1956f
22