LTC3858_15 Datasheet, PDF (20/38 Pages) Linear Technology – Low IQ, Dual 2-Phase Synchronous Step-Down Controller

LTC3858
APPLICATIONS INFORMATION
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (V_OUT)/(V_IN). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
C_IN
Required
I_RMS
≈
I_MAX
V_IN
⎡⎣(V_OUT )(V_IN
–
V_OUT )⎤⎦^1/2 (1)
Equation 1 has a maximum at V_IN = 2V_OUT, where I_RMS
= I_OUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturers’ ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3858, ceramic capacitors
can also be used for C_IN. Always consult the manufacturer
if there is any question.
The benefit of 2-phase operation can be calculated by
using Equation 1 for the higher power controller and
then calculating the loss that would have resulted if both
controller channels switched on at the same time. The
total RMS power lost is lower when both controllers are
operating due to the reduced overlap of current pulses
required through the input capacitor’s ESR. This is why
the input capacitor’s requirement calculated above for the
worst-case controller is adequate for the dual controller
design. Also, the input protection fuse resistance, battery
resistance, and PC board trace resistance losses are also
reduced due to the reduced peak currents in a 2-phase
system. The overall benefit of a multiphase design will
only be fully realized when the source impedance of the
power supply/battery is included in the efficiency testing.
The drains of the top MOSFETs should be placed within
1cm of each other and share a common C_IN (s). Separat-
ing the sources and C_IN may produce undesirable voltage
and current resonances at V_IN.
A small (0.1μF to 1μF) bypass capacitor between the chip
V_IN pin and ground, placed close to the LTC3858, is also
suggested. A 10Ω resistor placed between C_IN (C1) and
the V_IN pin provides further isolation between the two
channels.
The selection of C_OUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
output ripple (∆V_OUT) is approximated by:
ΔV_OUT
≈
ΔI_L
⎛
⎝⎜ ^ESR
+
8
•
f
1
• C_OUT
⎞
⎠⎟
where f_O is the operating frequency, C_OUT is the output
capacitance and ∆I_L is the ripple current in the inductor.
The output ripple is highest at maximum input voltage
since ∆I_L increases with input voltage.
Setting Output Voltage
The LTC3858 output voltages are each set by an external
feedback resistor divider carefully placed across the out-
put, as shown in Figure 6. The regulated output voltage
is determined by:
V_OUT
=
0.8V
⎛
⎝⎜
1+
R_B
R_A
⎞
⎠⎟
To improve the frequency response, a feedforward ca-
pacitor, C_FF, may be used. Great care should be taken to
route the V_FB line away from noise sources, such as the
inductor or the SW line.
V_OUT
1/2 LTC3858
V_FB
R_B
C_FF
R_A
3858 F06
Figure 6. Setting Output Voltage
Soft-Start (SS Pins)
The start-up of each V_OUT is controlled by the voltage on
the respective SS pin. When the voltage on the SS pin is
less than the internal 0.8V reference, the LTC3858 regulates
the V_FB pin voltage to the voltage on the SS pin instead
of 0.8V. The SS pin can be used to program an external
soft-start function.
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