LTC2327-18_15 Datasheet, PDF (20/26 Pages) Linear Technology – True Bipolar, Pseudo-Differential Input ADC with 95dB SNR

LTC2327-18
Timing Diagrams
Sleep Mode
To enter sleep mode, toggle CNV twice with no interven-
ing rising edge on SCK as shown in Figure 13. The part
will enter sleep mode on the falling edge of BUSY from
the last conversion initiated. Once in sleep mode, a rising
edge on SCK will wake the part up. Upon emerging from
sleep mode, wait t_WAKE ms before initiating a conversion
to allow the reference and reference buffer to wake up
and charge the bypass capacitors at REFIN and REFBUF.
CHAIN = DON’T CARE
RDL/SDI = DON’T CARE
CNV
BUSY
SCK
t_BUSYLH
CONVERT
NAP
ACQUIRE
t_CNVH
t_HOLD
t_CONV
t_ACQ
CONVERT
t_CONV
SLEEP
NAP AND
ACQUIRE
t_WAKE
CONVERT
CHAIN = DON’T CARE
RDL/SDI = DON’T CARE
CNV
CONVERT
t_CNVH
SLEEP
NAP AND
ACQUIRE
t_WAKE
CONVERT
BUSY
SCK
t_BUSYLH
t_CONV
Figure 13. Sleep Mode Timing Diagram
232718 F13
20
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