LTC1282 Datasheet, PDF(20/24 Page) Linear Technology – 3V 140ksps 12-Bit Sampling A/D Converter with Reference

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LTC1282 Datasheet, PDF (20/24 Pages) Linear Technology – 3V 140ksps 12-Bit Sampling A/D Converter with Reference

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LTC1282

APPLICATI S I FOR ATIO

A23

ADDRESS BUS

MC68000

DTACK

R/W

D11

ADDRESS

DECODE

DATA BUS

ADDITIONAL PINS OMITTED FOR CLARITY

LTC1282

BUSY

D11

D0/8 HBEN

LTC1282 â¢ F21

Figure 21. MC68000 Interface

8085A/Z80 Microprocessor

Figure 22 shows an LTC1282 interface for the Z80 and

8085A. The LTC1282 is operating in the Slow Memory

Mode and a two byte read is required. Not shown in the

figure is the 8-bit latch required to demultiplex the 8085A

common address/data bus. A0 is used to assert HBEN so

that an even address (HBEN = LOW) to the LTC1282 will

start a conversion and read the low data byte. An odd

address (HBEN = HIGH) will read the high data byte. This

is accomplished with the single 16-bit LOAD instruction

below.

For the 8085A

For the Z80

LHLD (B000)

LDHL, (B000)

A15

MREQ

Z80

8085A

WAIT

ADDRESS BUS

ADDRESS

DECODE

DATA BUS

HBEN

BUSY

LTC1282

D0/8

This is a two byte read instruction which loads the ADC

data (address B000) into the HL register pair. During the

first read operation, BUSY forces the microprocessor to

WAIT for the LTC1282 conversion. No WAIT states are

inserted during the second read operation when the mi-

croprocessor is reading the high data byte.

TMS32010 Microcomputer

Figure 23 shows an LTC1282/TMS32010 interface. The

LTC1282 is operating in the ROM Mode. The interface is

designed for a maximum TMS32010 clock frequency of

18MHz but will typically work over the full TMS32010

clock frequency range.

The LTC1282 is mapped at a port address. The following

I/O instruction starts a conversion and reads the previous

conversion result into data memory.

IN A,PA

(PA = PORT ADDRESS)

When conversion is complete, a second I/O instruction

reads the up-to-date data into memory and starts another

conversion. A delay at least as long as the ADC conversion

time must be allowed between I/O instructions.

PA2

PA0

DEN

TMS32010

PORT ADDRESS BUS

ADDRESS

DECODE

LTC1282

D11

DATA BUS

D0/8 HBEN

LINEAR CIRCUITRY OMITTED FOR CLARITY

Figure 23. TMS32010 Interface

LTC1282 â¢ F23

LINEAR CIRCUITRY OMITTED FOR CLARITY

LTC1282 â¢ F22

Figure 22. 8085A and Z80 Interface

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