LTC2655_15 Datasheet, PDF (19/28 Pages) Linear Technology – Quad I2C 16-/12-Bit Rail-to-Rail DACs with 10ppm/C Max Reference

LTC2655
OPERATION
The LTC2655 is a family of quad voltage output DACs in
20-lead 4mm × 4mm QFN and in 16-lead narrow SSOP
packages. Each DAC can operate rail-to-rail in external
reference mode, or with its full-scale voltage set by an
integrated reference. Four combinations of accuracy (16-bit
and 12-bit), and full-scale voltage (2.5V or 4.096V) are
available. The LTC2655 is controlled using a 2-wire I²C
compatible interface.
Power-On Reset
The LTC2655-L/LTC2655-H clear the output to zero-scale
if PORSEL pin is tied to GND, when power is first applied,
making system initialization consistent and repeatable. For
some applications, downstream circuits are active during
DAC power-up, and may be sensitive to nonzero outputs
from the DAC during this time. The LTC2655 contains
circuitry to reduce the power-on glitch. The analog outputs
typically rise less than 10mV above zero-scale during power
on if the power supply is ramped to 5V in 1ms or more.
In general, the glitch amplitude decreases as the power
supply ramp time is increased. See Power-On Reset Glitch
in the Typical Performance Characteristics section.
Alternatively, if PORSEL pin is tied to V_CC, The LTC2655-L/
LTC2655-H set the output to mid-scale when power is
first applied.
Power Supply Sequencing and Start-Up
For the LTC2655 family of parts, the internal reference is
powered up at start-up by default. If an external reference
is to be used, REFCOMP (Pin 3/Pin 2, GN/UF) must be
hardwired to GND. This configuration allows the use of an
external reference at start-up and converts the REFIN/OUT
pin to an input. However, the internal reference will still be
ON and draw supply current. In order to use an external
reference, command 0111b should be used to turn the
internal reference off (see Table 1).
The voltage at REFIN/OUT (Pin 5/Pin 4, GN/UF) should be
kept within the range – 0.3V ≤ REFIN/OUT ≤ V_CC + 0.3V
(see the Absolute Maximum Ratings section). Particular
care should be taken to observe these limits during power
supply turn-on and turn-off sequences, when the voltage
at V_CC (Pin 15/Pin 18, GN/UF) is in transition.
Transfer Function
The digital-to-analog transfer function is
V_OUT(IDEAL) = 2 • k/2^N [V_REF – REFLO] + REFLO
where k is the decimal equivalent of the binary DAC input
code, N is the resolution, and V_REF is the voltage at the
REFIN/OUT Pin. The resulting DAC output span is 0V to
2•V_REF, as it is necessary to tie REFLO to GND. V_REF is
nominally 1.25V for LTC2655-L and 2.048V for LTC2655-H,
in internal reference mode.
Table 1
COMMAND*
C3 C2 C1 C0
0 0 0 0 Write to Input Register n
0 0 0 1 Update (Power-Up) DAC Register n
0 0 1 0 Write to Input Register n, Update (Power-Up) All
0 0 1 1 Write to and Update (Power-Up) n
0 1 0 0 Power-Down n
0 1 0 1 Power-Down Chip (All DAC’s and Reference)
0 1 1 0 Select Internal Reference (Power-Up Reference)
0 1 1 1 Select External Reference (Power-Down Reference)
1 1 1 1 No Operation
ADDRESS (n)*
A3 A2 A1 A0
0 0 0 0 DAC A
0 0 0 1 DAC B
0 0 1 0 DAC C
0 0 1 1 DAC D
1 1 1 1 All DACs
* Command and address codes not shown are reserved and should not
be used.
Serial Interface
The LTC2655 communicates with a host using the stan-
dard 2-wire I²C interface. The Timing Diagram (Figure 1)
shows the timing relationship of the signals on the bus.
The two bus lines, SDA and SCL, must be high when the
bus is not in use. External pull-up resistors or current
sources are required on these lines. The value of these
pull-up resistors is dependent on the power supply and
can be obtained from the I²C specifications. For an I²C
bus operating in the fast mode, an active pull-up will be
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