LTC1871-1_15 Datasheet, PDF (19/36 Pages) Linear Technology – Wide Input Range, No RSENSE Current Mode Boost, Flyback and SEPIC Controller

LTC1871-1
APPLICATIONS INFORMATION
Burst Mode operations begins, since it is the peak current
that is being clamped.
The output voltage ripple can increase during Burst Mode
operation if ΔI_L is substantially less than I_BURST. This can
occur if the input voltage is very low or if a very large
inductor is chosen. At high duty cycles, a skipped cycle
causes the inductor current to quickly decay to zero.
However, because ΔI_L is small, it takes multiple cycles
for the current to ramp back up to I_BURST(PEAK). Dur-
ing this inductor charging interval, the output capacitor
must supply the load current and a significant droop in
the output voltage can occur. Generally, it is a good idea
to choose a value of inductor ΔI_L between 25% and 40%
of I_IN(MAX). The alternative is to either increase the value
of the output capacitor or disable Burst Mode operation
using the MODE/SYNC pin.
Burst Mode operation can be defeated by connecting the
MODE/SYNC pin to a high logic-level voltage (either with
a control input or by connecting this pin to INTV_CC). In
this mode, the burst clamp is removed, and the chip can
operate at constant frequency from continuous conduction
mode (CCM) at full load, down into deep discontinuous
conduction mode (DCM) at light load. Prior to skipping
pulses at very light load (i.e., < 5% of full load), the
controller will operate with a minimum switch on-time
in DCM. Pulse skipping prevents a loss of control of
the output at very light loads and reduces output volt-
age ripple.
Efficiency Considerations: How Much Does V_DS
Sensing Help?
The efficiency of a switching regulator is equal to the
output power divided by the input power (×100%).
Percent efficiency can be expressed as:
% Efficiency = 100% – (L1 + L2 + L3 + …),
where L1, L2, etc. are the individual loss components
as a percentage of the input power. It is often useful to
analyze individual losses to determine what is limiting
the efficiency and which change would produce the most
improvement. Although all dissipative elements in the
circuit produce losses, four main sources usually account
for the majority of the losses in LTC1871-1 applica-
tion circuits:
1. The supply current into V_IN. The V_IN current is the
sum of the DC supply current I_Q (given in the Electrical
Characteristics) and the MOSFET driver and control
currents. The DC supply current into the V_IN pin is typi-
cally about 550μA and represents a small power loss
(much less than 1%) that increases with V_IN. The driver
current results from switching the gate capacitance
of the power MOSFET; this current is typically much
larger than the DC current. Each time the MOSFET is
switched on and then off, a packet of gate charge Q_G
is transferred from INTV_CC to ground. The resulting
dQ/dt is a current that must be supplied to the INTV_CC
capacitor through the V_IN pin by an external supply. If
the IC is operating in CCM:
I_Q(TOT) ≈ I_Q = f • Q_G
P_IC = V_IN • (I_Q + f • Q_G)
2. Power MOSFET switching and conduction losses. The
technique of using the voltage drop across the power
MOSFET to close the current feedback loop was chosen
because of the increased efficiency that results from
not having a sense resistor. The losses in the power
MOSFET are equal to:
P_FET
=


I_O(MAX)
1– D_MAX


2
•
R_DS(ON)
•
D_MAX
•

_T
( ) ^{+k • VO1.85 •}
I_O(MAX)
1– D_MAX
• C_RSS • f
The I²R power savings that result from not having a
discrete sense resistor can be calculated almost by
inspection.
P_R(SENSE)
=



I_O(MAX)
1– D_MAX


2
•
R_SENSE
•
D_MAX
To understand the magnitude of the improvement with
this V_DS sensing technique, consider the 3.3V input,
5V output power supply shown in Figure 1. The maxi-
mum load current is 7A (10A peak) and the duty cycle
is 39%. Assuming a ripple current of 40%, the peak
inductor current is 13.8A and the average is 11.5A.
With a maximum sense voltage of about 140mV, the
sense resistor value would be 10mΩ, and the power
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