LTC1416_15 Datasheet, PDF (19/20 Pages) Linear Technology – Low Power 14-Bit, 400ksps Sampling ADC

LTC1416
APPLICATIONS INFORMATION
CS = RD = 0
CONVST
BUSY
t_CONV
t₁₃
t₅
t₆
DATA
DATA (N – 1)
DB13 TO DB0
t₈
t₆
t₆
t₇
DATA N
DB13 TO DB0
DATA (N + 1)
DB13 TO DB0
1416 F18
Figure 18. Mode 1b. CONVST Starts a Conversion. Data Outputs Always Enabled
(CONVST =
)
CS = 0
CONVST
BUSY
RD
DATA
(SAMPLE N)
t_CONV
t₅
t₆
t₁₃
t₈
t₉
t₁₁
t₁₂
t₁₀
DATA N
DB13 TO DB0
1416 F19
Figure 19. Mode 2. CONVST Starts a Conversion. Data Is Read by RD
CS = 0
RD = CONVST
BUSY
DATA
t_CONV
(SAMPLE N)
t₆
t₈
t₁₁
t₁₀
DATA (N – 1)
DB13 TO DB0
t₇
DATA N
DB13 TO DB0
DATA N
DB13 TO DB0
Figure 20. Slow Memory Mode Timing
DATA (N + 1)
DB13 TO DB0
1416 F20
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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