LTC4214-1 Datasheet, PDF (18/32 Pages) Linear Technology – Negative Low Voltage Hot Swap Controllers

LTC4214-1/LTC4214-2
APPLICATIO S I FOR ATIO
for C_T is calculated based on the maximum time it takes the
load capacitor to charge. That time is given by:
t_CL(CHARGE)
=
C
•V
I
=
C _L• V _SUPPLY(MAX)
I_INRUSH(MIN)
(11)
The maximum current flowing in the DRAIN pin is given
by:
I_DRN(MAX)
=
V _SUPPLY(MAX)−
R_D
V _DRNCL
(12)
Approximating a linear charging rate as I_DRN drops from
I_DRN(MAX) to zero, the I_DRN component in Equation (3) can
be approximated with 0.5 • I_DRN(MAX). Rearranging equa-
tion, TIMER capacitor C_T is given by:
( ) _{CT =}
t_CL(CHARGE) •
40µA + 4 • I_DRN(MAX)
3V
(13)
Returning to Equation (3), the TIMER period is calculated
and used in conjunction with V_SUPPLY(MAX) and
I_{SHORTCIRCUIT(MAX)} to check the SOA curves of a prospec-
tive MOSFET.
As a numerical design example, consider a 10W load,
which requires 1.1A input current at –10.8V. If
V_SUPPLY(MAX) = 13.2V and C_L = 100µF, R_D = 475k, Equa-
tion (8) gives R_S = 40mΩ; Equation (13) gives C_T = 34nF.
To account for errors in R_S, C_T, TIMER current (40µA),
TIMER threshold (3V), R_D, DRAIN current multiplier and
DRAIN voltage clamp (V_DRNCL), the calculated value should
be multiplied by 1.5, giving the nearest standard value of
C_T = 56nF.
If a short-circuit occurs, a current of up to 80mV/
40mΩ␣ =␣ 2A will flow in the MOSFET for 0.9ms as dictated
by C_T␣ =␣ 56nF in Equation (3). The MOSFET must be
selected based on this criterion. The IRF7413 can handle
20V and 2A for 9ms and is safe to use in this application.
Computing the maximum soft-start capacitor value during
soft-start to a load short is complicated by the nonlinear
MOSFET’s SOA characteristics and the R_SSC_SS response.
An overly conservative but simple approach begins with
the maximum circuit breaker current, given by:
I_CB(MAX)=
56mV
R_S
(14)
From the SOA curves of a prospective MOSFET, determine
the time allowed, t_SOA(MAX). C_SS is given by:
C_SS
=
t_SOA(MAX)
1.61• R_SS
(15)
In the above example, 56mV/40mΩ gives 1.4A. t_SOA(MAX)
for the IRF7413 is 8ms for 1.4A at 30V. From Equation
(15), C_SS = 68nF. Actual board evaluation showed that
C_SS = 33nF was appropriate. The ratio (R_SS • C_SS) to
t_CL(CHARGE) is a good gauge as a large ratio may result in
the time-out period expiring. This gauge is determined
empirically with board level evaluation.
SUMMARY OF DESIGN FLOW
To summarize the design flow, consider the application
shown in Figure 2. It was designed for 12W for a –10V to
–14V supply.
Calculate the maximum load current: 12W/10V = 1.2A;
allowing for 75% converter efficiency, I_IN(MAX) = 1.6A.
Calculate R_S: from Equation (8) R_S = 25mΩ.
Calculate I_{SHORTCIRCUIT(MAX)}: from Equation (10)
I_{SHORTCIRCUIT(MAX)} = 3.2A.
Select a MOSFET that can handle 3.2A at 14V: IRF7413.
Calculate C_T: from Equation (13) C_T = 24nF. Select
C_T␣ =␣ 47nF, which gives the circuit breaker time-out period
t_MAX␣ = 0.7ms.
Consult MOSFET SOA curves: the IRF7413 can handle
3.2A at 20V for 3.5ms, so it is safe to use in this
application.
Calculate C_SS: using Equations (14) and (15) select
C_SS␣ =␣ 22nF.
FREQUENCY COMPENSATION
The LTC4214 typical frequency compensation network for
the analog current limit loop is a series R_C (10Ω) and C_C
connected to V_EE. Figure 6 depicts the relationship be-
421412f
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