LTC1960CGPBF Datasheet, PDF (18/28 Pages) Linear Technology – Dual Battery Charger/ Selector with SPI Interface

LTC1960
OPERATION
The Current DAC Block
The current DAC is a delta-sigma modulator which controls
the effective value of an internal resistor, R_SET = 18.77k,
used to program the maximum charger current. Figure 6 is
a simplified diagram of the DAC operation. The delta-sigma
modulator and switch convert the IDAC value, received
via SPI communication, to a variable resistance equal to
1.25R_SET/(IDAC_(VALUE)/1023). In regulation, I_SET is servo
driven to the 0.8V reference voltage, V_REF , and the cur-
rent from R_SET is matched against a current derived from
the voltage between pins CSP and CSN. This current is
(V_CSP – V_CSN)/3k.
Therefore, programmed current is:
I_AVG
=
V_REF • 3k
(1.25R_SNS R_SET )
•
 IDAC_(VALUE)
 1023


When the low current mode bit (D10) is set to 1, the current
DAC enters a different mode of operation. The current DAC
output is pulse-width modulated with a high frequency clock
having a duty cycle value of 1/8. Therefore, the maximum
output current provided by the charger is I_MAX/8. The
delta-sigma output gates this low duty cycle signal on
and off. The delta-sigma shift registers are then clocked
at a slower rate, about 40ms/bit, so that the charger has
time to settle to the I_MAX/8 value. The resulting average
charging current is equal to 1/8 of the current programmed
in normal mode. Dual battery charging is disabled in low
current mode. If both batteries are selected for charging,
then only BAT1 will charge.
(V_CSP – V_CSN)
3kΩ
(FROM CA1 AMPLIFIER)
I_SET
+
C_SET
V_REF
–
R_SET
18.77k
∆Σ
10
MODULATOR
TO
I_TH
DAC
VALUE
(10 BITS)
1960 F06
Figure 6. Current DAC Operation
I_MAX/8
0
AVERAGE CHARGER CURRENT
~40ms
1960 F07
Figure 7. Charging Current Waveform in Low Current Mode
1960fb
18