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LT5514 Datasheet, PDF (18/20 Pages) Linear Technology – Ultralow Distortion IF Amplifier/ADC Driver with Digitally Controlled Gain
LT5514
APPLICATIO S I FOR ATIO
Rather, it represents a compromise that most accurately
measures the actual operation of the part by itself,
undistorted by the artifacts of the impedance transformation
network, or by external bandwidth limiting factors. Balun
transformers are used to interface with single-ended test
equipment. Input and output resistive attenuators (not
shown) provide broadband I/O impedance control. The
L1, L2 inductors are selected for maximally flat AC output
response. COUT (normally open) shows the placement of
capacitive loading when this is specified as a
characterization variable. The VCCO monitor pin allows
setting the output DC level (5V typical) by adjusting
voltage VOSUP.
Application (Demo) Boards
The LT5514 demo boards are provided in the versions
shown in Figure 10 (with output transformer) and Fig-
ure␣ 11 (without output transformer). All I/O signal ports
are matched to 50Ω. Moreover, 1k resistors (not shown)
connect all six control pins (ENA, ENB, PGA0, PGA1,
PGA2, PGA3) to VCC, such that the LT5514 is shipped in
maximum gain state and with both amplifier blocks en-
abled (Standard mode).
The gain setting can be changed by connecting the control
pins to ground. Test points (TP1, TP2, TP3) are provided
to monitor the input and output DC bias voltage. Jumper
J1 can be removed when differential input is desired, but
in that case, T1 should be changed to a 1:1 center-tap
transformer to preserve 50Ω input matching. The demo
board is shipped with optional output back-matching
resistor RMATCH = 255Ω. This results in a net output load,
ROUT = 100Ω, presented to the LT5514.
The Output Transformer Application Board (Figure 10) is
one example of an output impedance transformation
(T2 transformer). For the Typical Performance Character-
istics curves, all linearity tests are performed on this
board. By removing RMATCH, the performance with ROUT
= 200Ω can be evaluated (provided the lack of impedance
back-matching is suitably remedied). Measured OIP3 for
both cases, ROUT = 100Ω and 200Ω, is shown in Figure 12.
58
DUT RMATCH = 255Ω
55
BOARD RMATCH = 255Ω
DUT RMATCH = OPEN
52
BOARD RMATCH = OPEN
49
46
43
40
37
34
0
50
100
150
200
FREQUENCY (MHz)
5514 F12
Figure 12. Typical OIP3 for Transformer Board
VCC
C2
ENA
ENB
0.1µF
1
20
ENA
ENB
2
19
IF
IN
T1
3 VCC1
GND
VCC2 18
GND
1:2
4
LT5514
17
GND
GND
5 IN+
OUT– 16
6 IN–
OUT+ 15
7
14
J1
0 TC2-1T
C1
0.47µF
GND
8
GND
9
GND
13
GND
12
PGA0
PGA3
10
11
PGA1
PGA2
ROUT
50Ω
R1 R2
50Ω 50Ω
C4
0.1µF
VOSUP
C3
4.7µF
IF
OUT
C5
47nF
RLOAD
100Ω
C6
J2
47nF
0PEN
DIFFERENTIAL OUTPUT
RESISTIVE DEMO BOARD
PGA0 PGA1
PGA2 PGA3
5514 F11
Figure 11. Wideband Differential Output Application Board (Simplified Schematic)
5514f
18