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LTM4619 Datasheet, PDF (17/24 Pages) Linear Technology – Dual, 26VIN, 4A DC/DC μModule Regulator
LTM4619
APPLICATIONS INFORMATION
Layout Checklist/Example
The high integration of LTM4619 makes the PCB board
layout very simple and easy. However, to optimize its electri-
cal and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current path, includ-
ing VIN, PGND, VOUT1 and VOUT2. It helps to minimize
the PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output capaci-
tors next to the VIN, PGND and VOUT pins to minimize
high frequency noise.
• Place a dedicated power ground layer underneath the
unit.
• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnections
between top layer and other power layers.
• Do not put vias directly on the pad.
• Use a separated SGND ground copper area for com-
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
• Decouple the input and output grounds to lower the
output ripple noise. Refer to Figure 17.
Figure 17 gives a good example of the recommended
layout.
PGND
TOP VIEW
VIN
M
L
CIN2
K
CIN1
J
H
G
F
E
D
C
B
A
1 2 3 4 5 6 7 8 9 10 11 12
COUT2
COUT1
VOUT2
PGND
VOUT1
PGND
Figure 17. Recommended PCB Layout
4619f
17