LTC6417 Datasheet, PDF (17/32 Pages) Linear Technology – 1.6GHz Low Noise High Linearity Differential Buffer/ 16-Bit ADC Driver with Fast Clamp

DC Test Circuit Schematic
V⁺
1, 6, 11, 16
V_CM
15
V⁺
V_CM
V_INDIFF = IN⁺ – IN^–
V_INCM
=
IN⁺
+
2
IN^–
CLHI
IN⁺
IN^–
PWRADJ
2
8
9
5
CLHI
IN⁺
IN^–
LTC6417
OUT⁺
OUT^–
19
PWRADJ ^VOR
18
SHDN
14
12
V_OR
3, 7, 10, 17, 20, 21
LTC6417
C_LOAD
OUT^–
R_LOAD
OUT⁺
6417 TC
V_OUTDIFF = OUT⁺ – OUT^–
V_OUTCM =
OUT⁺ + OUT^–
2
Block Diagram
LTC6417 Simplified Schematic
V⁺
IN⁺
CLHI
×1
–
×2 +
V_CM
×1
IN^–
PWRADJ
SHDN
GND
REFERENCE AND
BIAS CONTROL
I1
QP3
QP1
I2
CLLO
QP4
QP2
QN1
QN3
OVER ^VOR
RANGE
DETECT
OUT⁺
QN2
QN4
I3
I4
OUT^–
6417 BD
6417f
17