LTC2486_15 Datasheet, PDF (17/36 Pages) Linear Technology – 16-Bit 2-/4-Channel ADC with PGA and Easy Drive Input Current Cancellation

LTC2486
APPLICATIONS INFORMATION
Table 2. LTC2486 Output Data Format
DIFFERENTIAL INPUT VOLTAGE BIT 23 BIT 22 BIT 21 BIT 20 BIT 19 BIT 18 BIT 17 …
V_IN*
EOC DMY SIG MSB
V_IN* ≥ FS**
0
0
1
1
0
0
0
…
FS** – 1LSB
0
0
1
0
1
1
1
…
0.5 • FS**
0
0
1
0
1
0
0
…
0.5 • FS** – 1LSB
0
0
1
0
0
1
1
…
0
0
0 1/0*** 0
0
0
0
…
–1LSB
0
0
0
1
1
1
1
…
–0.5 • FS**
0
0
0
1
1
0
0
…
–0.5 • FS** – 1LSB
0
0
0
1
0
1
1
…
–FS**
0
0
0
1
0
0
0
…
V_IN* < –FS**
0
0
0
0
1
1
1
…
*The differential input voltage V_IN = IN⁺ – IN^–. **The full-scale voltage FS = 0.5 • V_REF/Gain.
***The sign bit changes state during the 0 output code when the device is operating in the 2x speed mode.
BIT 4 BITS 3 TO 0
0
0000
1
0000
0
0000
1
0000
0
0000
1
0000
0
0000
1
0000
0
0000
1
0000
The first three bits shifted into the device consist of two
preamble bits and an enable bit. These bits are used to
enable the device configuration and input channel selec-
tion. Valid settings for these three bits are 000, 100 and
101. Other combinations should be avoided. If the first
three bits are 000 or 100, the following data is ignored
(don’t care) and the previously selected input channel and
configuration remain valid for the next conversion.
If the first three bits shifted into the device are 101, then
the next five bits select the input channel for the next
conversion cycle (see Table 3).
The first input bit (SGL) following the 101 sequence
determines if the input selection is differential (SGL =
0) or single-ended (SGL = 1). For SGL = 0, two adjacent
channels can be selected to form a differential input. For
Table 3 Channel Selection
MUX ADDRESS
CHANNEL SELECTION
ODD/
SGL SIGN A2 A1 A0 0 1 2 3 COM
*0
0
0
0
0 IN⁺ IN^–
00001
IN⁺ IN^–
0
1
0
0
0 IN^– IN⁺
01001
IN^– IN⁺
1 0 0 0 0 IN⁺
IN^–
10001
IN⁺
IN^–
11000
IN⁺
IN^–
11001
IN⁺ IN^–
*Default at power up
SGL = 1, one of four channels is selected as the positive
input. The negative input is COM for all single ended
operations. The remaining four bits (ODD, A2, A1, A0)
determine which channel(s) is/are selected and the polarity
(for a differential input).
The next serial input bit immediately following the input
channel selection is the enable bit for the conversion
configuration (EN2). If this bit is set to 0, then the next
conversion is performed using the previously selected
converter configuration.
The second set of configuration data can be loaded into
the device by setting EN2 = 1 (see Table 4). The first bit
(IM) is used to select the internal temperature sensor. If
IM = 1, the following conversion will be performed on
the internal temperature sensor rather than the selected
input channel. The next two bits (FA and FB) are used to
set the rejection frequency. The next bit (SPD) is used to
select either the 1x output rate if SPD = 0 (auto-calibration
is enabled and the offset is continuously calibrated and
removed from the final conversion result) or the 2x output
rate if SPD = 1 (offset calibration disabled, multiplexing
output rates up to 15Hz with no latency). When IM = 1
(temperature measurement) SPD, GS2, GS1 and GS0 will
be ignored and the device will operate in 1x mode. The
final 3 bits (GS2, GS1, GS0) are used to set the gain. The
configuration remains valid until a new input word with
EN = 1 (the first three bits are 101) and EN2 = 1 is shifted
into the device.
2486fe
For more information www.linear.com/LTC2486
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