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LTC2382-16 Datasheet, PDF (17/24 Pages) Linear Technology – 16-Bit, 500ksps, Low Power SAR ADC with Serial Interface
LTC2382-16
TIMING DIAGRAM
Normal Mode, Multiple Devices
Figure 13 shows multiple LTC2382-16 devices operating
in Normal Mode(CHAIN = 0) sharing CNV, SCK and SDO.
By sharing CNV, SCK and SDO, the number of required
signals to operate multiple ADCs in parallel is reduced.
Since SDO is shared, the RDL/SDI input of each ADC must
be used to allow only one LTC2382-16 to drive SDO at a
time in order to avoid bus conflicts. As shown in Figure 13,
the RDL/SDI inputs idle high and are individually brought
low to read data out of each device between conversions.
When RDL/SDI is brought low, the MSB of the selected
device is output onto SDO. To ensure the MSB is properly
output and captured, SCK must be held low at least 1ns
before and 16ns after bringing RDL/SDI low.
CNV
CHAIN
LTC2382-16
SDO
B
RDL/SDI
SCK
CNV
CHAIN
BUSY
LTC2382-16
SDO
A
RDL/SDI
SCK
RDL2
RDL1
CONVERT
IRQ
DIGITAL HOST
DATA IN
CLK
238216 F13a
ACQUIRE
CHAIN = 0
CNV
BUSY
tBUSYLH
RDL/SDIA
CONVERT
tHOLD
tCONV
POWER-DOWN
ACQUIRE
POWER-UP
tCNVL
CONVERT
RDL/SDIB
SCK
SDO
tHSCKRDL
tSSCKRDL
tEN
Hi-Z
tSCK
1
2
3
14 15 16
tSCKH
17 18 19
tHSDO
tDSDO
D15A D14A D13A
tDIS
D1A D0A
tSCKL
Hi-Z
D15B D14B D13B
30 31 32
D1B D0B
Hi-Z
238216 F13
Figure 13. Normal Mode with Multiple Devices Sharing CNV, SCK and SDO
238216f
17