LTC2366_15 Datasheet, PDF (17/24 Pages) Linear Technology – 1Msps/3Msps, 12-Bit Serial Sampling ADCs in TSOT

LTC2365/LTC2366
Applications Information
Exiting Sleep Mode and Power-Up Time
To exit sleep mode, pull CS LOW and perform a dummy
conversion. The LTC2365/LTC2366 device power up
completely after the 16th falling edge of SCK. After power-
ing up, the ADC can continuously acquire an input signal
and perform conversions as described in the SERIAL
INTERFACE section (see Figure 15). The wake-up time is
333ns for the LTC2366 with a 48MHz SCK and 1µs for
the LTC2365 with a 16MHz SCK.
The sample-and-hold is in hold mode while the device is
in sleep mode. The ADC returns to sample mode after the
1st falling edge of SCK during power-up (see Figure 15).
POWER versus SAMPLING RATE
Figure 16 shows the power consumption of the LTC2365/
LTC2366 in operational mode. By taking the ADC into sleep
mode when not performing a conversion, the average
power consumption of the ADC decreases as the sampling
rate decreases. Figure 17 shows the power consumption
versus sampling rate with the device in sleep mode when
not performing a conversion.
THE DEVICE BEGINS
TO POWER UP
THE DEVICE BEGINS
TO ACQUIRE INPUT
t_POWER-UP
THE DEVICE IS FULLY
POWERED UP AND READY
TO PERFORM CONVERSION
CS
12
SCK
SDO
10 12 14 16
12
10 12 14 16
INVALID DATA
VALID DATA
Figure 15. LTC2365/LTC2366 Exiting Sleep Mode
23656 F15
7.5 _{VDD = 3V}
7.0 ^fSCK ^{= VARIABLE}
16 SCKS PER CONVERSION
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
0
500 1000 1500 2000 2500 3000
SAMPLE RATE (ksps)
23656 F16
Figure 16. Power Consumption vs Sample Rate while
the Device Remains Powered Up Continuously
8
V_DD = 3V
7 ^{fSCK = 48MHz}
6
5
4
3
2
1
0
0
250
500
750
1000
SAMPLE RATE (ksps)
23656 F17
Figure 17. Power Consumption vs Sample Rate while the Device
Enters Sleep Mode when not Performing Conversions
For more information www.linear.com/LTC2365
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