LTC1266-3.3_15 Datasheet, PDF (17/20 Pages) Linear Technology – Synchronous Regulator Controller for N- or P-Channel MOSFETs

LTC1266
LTC1266-3.3/LTC1266-5
APPLICATIO S I FOR ATIO
3. Are the SENSE^– and SENSE⁺ leads routed together with
minimum PC trace spacing? The 1000pF capacitor be-
tween Pins 8 and 9 should be as close as possible to the
LTC1266.
4. Does the (+) plate of C_IN connect to the source of the
topside MOSFET as closely as possible? This capacitor
provides the AC current to the topside MOSFET.
5. A 0.1µF to 1µF decoupling capacitor connected be-
tween V_IN (Pin 5) and ground is optional, but is sometimes
helpful in eliminating instabilities at high input voltage and
high output loads.
6. Is the shutdown (Pin 11) actively pulled to ground
during normal operation? The shutdown pin is high im-
pedance and must not be allowed to float. The select (Pins
3 and 4) are also high impedance and must be tied high or
low depending on the application.
TYPICAL APPLICATIO S (Layout Assist Schematics)
V_IN
≈ 3.9V TO 18V
(V_IN(MIN) = 3.5V IF I_LOAD < 0.8A)
+ ^1µF
BINH
C_T
220pF
C_C
3300pF
R_C
1k
*DALE LPT4545-A001
COILTRONICS CTX10-4
Si9430DY
1 _TDRIVE
BDRIVE ¹⁶
Si9410DY
2 _{PWR VIN}
15
PGND
3 _PINV
14
LB_OUT
4
BINH
LB_IN ¹³
5
LTC1266-3.3
12
V_IN
SGND
6 _CT
11
SHDN
SHUTDOWN
7
I_TH
NC ¹⁰
8 _{SENSE– SENSE+} 9
1000pF
+
D1
MBRS140T3
C_IN
100µF
25V
L*
10µH
+
R_SENSE
0.033Ω
C_OUT
220µF
10V
2×
V_OUT
3.3V
3A 1266 F11
Figure 11. Low Dropout, 3.3V/3A High Efficiency Regulator
17