LT1941 Datasheet, PDF (17/24 Pages) Linear Technology – Triple Monolithic Switching Regulator

LT1941
APPLICATIO S I FOR ATIO
Table 5. Converter Equivalent Model Parameters
STEP-DOWN1 STEP-DOWN2 BOOST
INVERTER
V_FB
0.628V
0.628V
1.25
1.24
R_O
500kΩ
500kΩ
500kΩ
500kΩ
g_ma
1700µmho
1700µmho 800µmho 800µmho
g_mp
5mho
3.6mho
V_IN • 5mho
V_OUT
V_IN • 5mho
–V_OUT
CURRENT MODE
POWER STAGE
g_mp
500k
GND
V_C
LT1941
V_SW
ERROR
AMPLIFIER
FB
g_ma
V_FB
R_C
C_F
C_C
OUTPUT
R1
C_PL
ESR
+
C1
POLYMER
R2
OR
TANTALUM
C1
CERAMIC
1941 F05
Figure 5. Model for Loop Response
SOFT-START AND SHUTDOWN
The RUN/SS (Run/Soft-Start) pins are used to place the
individual switching regulators and the internal bias cir-
cuits in shutdown mode. They also provide a soft-start
function. To shut down a regulator, pull its RUN/SS pin to
ground with an open drain or collector. If all three RUN/SS
pins are pulled to ground, the LT1941 enters its shutdown
mode with all regulators off and quiescent current reduced
to ~50mA. Internal 2µA current sources pull up on each
pin. If any RUN/SS pin reaches ~0.6V, the internal bias
circuits start and the quiescent currents increase to their
nominal levels.
If a capacitor is tied from the RUN/SS pin to ground, then
the internal pull-up current will generate a voltage ramp on
this pin. This voltage clamps the V_C pin, limiting the peak
switch current and therefore input current during start-up.
A good value for the soft-start capacitor is C_OUT/10,000,
where C_OUT is the value of the output capacitor.
The RUN/SS pins can be left floating if the shutdown
feature is not used. They can also be tied together with a
single capacitor providing soft-start. The internal current
sources will charge these pins to ~2V.
The RUN/SS pins provide a soft-start function that limits
peak input current to the circuit during start-up. This helps
to avoid drawing more current than the input source can
supply or glitching the input supply when the LT1941 is
enabled. The RUN/SS pins do not provide an accurate
delay to start or an accurately controlled ramp at the
output voltage, both of which depend on the output
capacitance and the load current. However, the power
good indicators can be used to sequence the three out-
puts, as described below.
POWER GOOD INDICATORS
The PGOOD pin is the open-collector output of an internal
comparator. PGOOD remains low until the FB pin is within
10% of the final regulation voltage. Tie the PGOOD to any
supply with a pull-up resistor that will supply less than
200µA. Note that this pin will be open when the LT1941 is
in shutdown mode (all three RUN/SS pins at ground)
regardless of the voltage at the FB pin. PGOOD is valid
when the LT1941 is enabled (any RUN/SS pin is high) and
V_IN is greater than ~3.5V.
The 5GOOD and 12GOOD pins are also open-collector
outputs of internal comparators. The 5GOOD pin remains
low until the input is within 10% of 5V. Tie the 5GOOD and
12GOOD pins to any supply with a pull-up resistor that will
supply less than 100µA. The 12GOOD pin remains low
until the input is within 10% of 12V. The 5GOOD and
12GOOD pins are valid as long as V_IN is greater than 1.1V.
Both the 5GOOD and 12GOOD pins will sink current when
the part is in shutdown, independent of the voltage at V_IN.
Output Sequencing
The PG and RUN/SS pins can be used to sequence the
three outputs. Figure 6 shows several circuits to do this.
The techniques shown to sequence two channels can be
extended to sequence the third. In each case channel 1
starts first. Note that these circuits sequence the outputs
during start-up. When shut down the three channels turn
off simultaneously.
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