LTC3859AL_15 Datasheet, PDF (16/44 Pages) Linear Technology – Triple Output, Buck/Buck/Boost Synchronous Controller with 28A Burst Mode IQ

LTC3859AL
operation
0.8V internal reference for the bucks and the 1.2V internal
reference for the boost, the LTC3859AL regulates the V_FB
voltage to the TRACK/SS pin voltage instead of the cor-
responding reference voltage. This allows the TRACK/SS
pin to be used to program a soft-start by connecting an
external capacitor from the TRACK/SS pin to SGND. An
internal 5µA pull-up current charges this capacitor creating
a voltage ramp on the TRACK/SS pin. As the TRACK/SS
voltage rises linearly from 0V to 0.8V/1.2V (and beyond
up to INTV_CC), the output voltage V_OUT rises smoothly
from zero to its final value.
Alternatively the TRACK/SS pins for buck channels 1 and 2
can be used to cause the start-up of V_OUT to track that of
another supply. Typically, this requires connecting to the
TRACK/SS pin an external resistor divider from the other
supply to ground (see the Applications Information section).
Light Load Current Operation (Burst Mode Operation,
Pulse-Skipping, or Continuous Conduction)
(PLLIN/MODE Pin)
The LTC3859AL can be enabled to enter high efficiency
Burst Mode operation, constant frequency pulse-skipping
mode or forced continuous conduction mode at low load
currents. To select Burst Mode operation, tie the PLLIN/
MODE pin to ground. To select forced continuous opera-
tion, tie the PLLIN/MODE pin to INTV_CC. To select pulse-
skipping mode, tie the PLLIN/MODE pin to a DC voltage
greater than 1.2V and less than INTV_CC – 1.3V.
When a controller is enabled for Burst Mode operation, the
minimum peak current in the inductor is set to approxi-
mately 25% of the maximum sense voltage (30% for the
boost) even though the voltage on the I_TH pin indicates a
lower value. If the average inductor current is higher than
the load current, the error amplifier EA will decrease the
voltage on the I_TH pin. When the I_TH voltage drops below
0.425V, the internal sleep signal goes high (enabling sleep
mode) and both external MOSFETs are turned off. The I_TH
pin is then disconnected from the output of the EA and
parked at 0.450V.
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC3859AL draws.
If channel 1 is in sleep mode and the other two are shut
down, the LTC3859AL draws only 28µA of quiescent cur-
rent. If channels 1 and 3 are in sleep mode and channel 2
is shut down, it draws only 33µA of quiescent current. If all
three controllers are enabled in sleep mode, the LTC3859AL
draws only 38µA of quiescent. In sleep mode, the load
current is supplied by the output capacitor. As the output
voltage decreases, the EA’s output begins to rise. When the
output voltage drops enough, the I_TH pin is reconnected
to the output of the EA, the sleep signal goes low, and the
controller resumes normal operation by turning on the top
external MOSFET on the next cycle of the internal oscillator.
When a controller is enabled for Burst Mode operation,
the inductor current is not allowed to reverse. The reverse
current comparator (IR) turns off the bottom external
MOSFET (the top external MOSFET for the boost) just
before the inductor current reaches zero, preventing it
from reversing and going negative. Thus, the controller
operates in discontinuous operation.
In forced continuous operation or clocked by an external
clock source to use the phase-locked loop (see the Fre-
quency Selection and Phase-Locked Loop section), the
inductor current is allowed to reverse at light loads or
under large transient conditions. The peak inductor cur-
rent is determined by the voltage on the I_TH pin, just as
in normal operation. In this mode, the efficiency at light
loads is lower than in Burst Mode operation. However,
continuous operation has the advantage of lower output
voltage ripple and less interference to audio circuitry. In
forced continuous mode, the output ripple is independent
of load current.
When the PLLIN/MODE pin is connected for pulse-skipping
mode, the LTC3859AL operates in PWM pulse-skipping
mode at light loads. In this mode, constant frequency
operation is maintained down to approximately 1% of
designed maximum output current. At very light loads, the
current comparator ICMP may remain tripped for several
cycles and force the external top MOSFET to stay off for
the same number of cycles (i.e., skipping pulses). The
inductor current is not allowed to reverse (discontinuous
operation). This mode, like forced continuous operation,
exhibits low output ripple as well as low audio noise and
reduced RF interference as compared to Burst Mode
operation. It provides higher low current efficiency than
forced continuous mode, but not nearly as high as Burst
Mode operation.
3859alf
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