LTC2140-12_15 Datasheet, PDF (16/38 Pages) Linear Technology – 12-Bit, 65Msps/ 40Msps/25Msps Low Power Dual ADCs

LTC2142-12/
LTC2141-12/LTC2140-12
PIN FUNCTIONS
D1_0_1^–/D1_0_1⁺ to D1_10_11^–/D1_10_11⁺ (Pins 47/48,
49/50, 51/52, 53/54, 55/56, 57/58): Channel 1 Double
Data Rate Digital Outputs. Two data bits are multiplexed
onto each differential output pair. The even data bits (D0,
D2, D4, D6, D8, D10) appear when CLKOUT⁺ is low. The
odd data bits (D1, D3, D5, D7, D9, D11) appear when
CLKOUT⁺ is high.
OF2_1^–/OF2_1⁺ (Pins 59/60): Over/Underflow Digital
Output. OF2_1⁺ is high when an overflow or underflow
has occurred. The over/underflow for both channels
are multiplexed onto this pin. Channel 2 appears when
CLKOUT⁺ is low, and Channel 1 appears when CLKOUT⁺
is high.
FUNCTIONAL BLOCK DIAGRAM
CH 1
ANALOG
INPUT
CH 2
ANALOG
INPUT
V_REF
2.2μF
SENSE
V_CM1
0.1μF
V_CM2
0.1μF
S/H
12-BIT
ADC CORE
S/H
12-BIT
ADC CORE
CORRECTION
LOGIC
OUTPUT
DRIVERS
1.25V
REFERENCE
RANGE
SELECT
REF
BUF
V_DD/2
REFH
REFL INTERNAL CLOCK SIGNALS
DIFF
CLOCK/DUTY
MODE
REF
CYCLE
CONTROL
AMP
CONTROL
REGISTERS
OV_DD
OF1
OF2
D1_11
•
•
•
D1_0
CLKOUT⁺
CLKOUT^–
D2_11
•
•
•
D2_0
OGND
V_DD
GND
REFH
REFL
2.2μF
ENC⁺ ENC^–
0.1μF
0.1μF
PAR/SER CS SCK SDI SDO
21421012 F01
Figure 1. Functional Block Diagram
16
21421012fa