LTC1703_15 Datasheet, PDF (16/36 Pages) Linear Technology – Dual 550kHz Synchronous 2-Phase Switching Regulator Controller with 5-Bit VID

LTC1703
APPLICATIO S I FOR ATIO
internal latch. This latch releases the pull-down at FAULT,
allowing the 10µA pull-up to take it high. When FAULT
goes high, the LTC1703 stops all switching, turns both QB
(bottom synchronous) MOSFETs on continuously and
remains in this state until both RUN/SS pins are pulled low
simultaneously, the power supply is recycled, or the
FAULT pin is pulled low externally. This behavior is
intended to protect a potentially expensive load from
overvoltage damage at all costs. Under some conditions,
this behavior can cause the output voltage to undershoot
below ground. If latched FAULT mode is used, a Schottky
diode should be added with its cathode at the output and
its anode at ground to clamp the negative voltage to a safe
level and prevent possible damage to the load and the
output capacitors.
Note that in overvoltage conditions, the MAX comparator
will kick in at just +5%, turning QB on continuously long
before the output reaches +15%. Under most fault condi-
tions, this is adequate to bring the output back down
without firing the fault latch. Additionally, if MAX success-
fully keeps the output below +15%, the LTC1703 will
resume normal regulation as soon as the output overvolt-
age fault is resolved.
In some circuits, the OV latch can be a liability. Consider
a circuit where the output voltage at one channel may be
changed on the fly by changing the VID code or switching
in different feedback resistors. A downward adjustment of
greater than 15% will fire the fault latch, disabling both
sides of the LTC1703 until the power is recycled. In circuits
such as this, the fault latch can be disabled by grounding
the FAULT pin. The internal latch will still be set the first
time the output exceeds +15%, but the 10µA current
source pull-up will not be able to pull FAULT high, and the
LTC1703 will ignore the latch and continue normal opera-
tion. The MAX comparator will act as usual, turning on QB
until output is within range and then allowing the loop to
resume normal operation. FAULT can also be pulled down
with external open-collector logic to restart a fault-latched
LTC1703 as an alternative to recycling the power. Note
that this will not reset the internal latch; if the external pull-
down is released, the LTC1703 will reenter FAULT mode.
To reset the latch, pull both RUN/SS pins low simulta-
neously or cycle the power.
16
VID Considerations
Some applications change the VID codes at channel 1 on
the fly. This is possible with the LTC1703, but care must be
taken to avoid tripping the overvoltage fault circuit. Step-
ping the voltage upwards abruptly is safe, but stepping
down quickly by more than 15% can leave the system in a
state where the output voltage is still at the old higher level,
but the feedback node is set to expect a new, substantially
lower voltage. If this condition persists for more than
25µs, the overvoltage fault circuitry will fire and latch off
the LTC1703.
The simplest solution is to disable the fault circuit by
grounding the FAULT pin. Systems that must keep the fault
circuit active should ensure that the output voltage is never
programmed to step down by more than 15% in any single
step. A safe strategy is to step the output down by 10% or
less at a time and wait for the output to settle to the new
value before taking subsequent steps. Regardless of the
state of the FAULT pin, the load is always protected against
overvoltage faults by the +5% MAX comparator.
EXTERNAL COMPONENT SELECTION
POWER MOSFETs
Getting peak efficiency out of the LTC1703 depends strongly
on the external MOSFETs used. The LTC1703 requires at
least two external MOSFETs per side—more if one or
more of the MOSFETs are paralleled to lower on-resis-
tance. To work efficiently, these MOSFETs must exhibit
low R_DS(ON) at 5V V_GS (3.3V V_GS if the PV_CC input supply
is 3.3V) to minimize resistive power loss while they are
conducting current. They must also have low gate charge
to minimize transition losses during switching. On the
other hand, voltage breakdown requirements in a typical
LTC1703 circuit are pretty tame: the 7V maximum input
voltage limits the V_DS and V_GS the MOSFETs can see to
safe levels for most devices.
Low R_DS(ON)
R_DS(ON) calculations are pretty straightforward. R_DS(ON) is
the resistance from the drain to the source of the MOSFET
when the gate is fully on. Many MOSFETs have R_DS(ON)
specified at 4.5V gate drive—this is the right number to
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