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LTC1067-50_15 Datasheet, PDF (16/20 Pages) Linear Technology – Rail-to-Rail, Very Low Noise Universal Dual Filter Building Block
LTC1067/LTC1067-50
APPLICATIONS INFORMATION
This would be used for operating Mode 3. Here, a 0Ω
resistor in the R61 position also works. Jumpers JP52 and
JP62 perform the same functions on the B side of the part.
The buffering amplifier can be configured for inverting or
noninverting operation. For inverting applications, con-
nect jumper JP2 positions 1 and 2. Additionally, connect
jumper JP4 for split supply applications or JP8 for a single
supply. For a noninverting application, connect jumper
JP2 positions 2 and 3.
Several other jumpers should be connected as follows:
JP1: Install a jumper wire from position 1 to position 2,
leave the other positions open.
JP5: Install a jumper wire if split supply, leave open if
single supply.
JP6: Leave open.
JP7: Install a jumper wire.
JP9: Install a jumper wire if single supply, leave open if
split supply.
TP1
V+
C3 +
10µF
16V
TP9
D1
MBR0630T1
R41
R31
R21
TP4
VIN
TP10
1 JP1 2 R11
3
4
JP61
R61
JP51
R51
C6, 0.1µF
J1
CLOCK
IN
R1
200Ω
1%
1 V+
16
CLK
2
NC
15
AGND
3 V+
4
SA
LTC1067
OR
V– 14
13
SB
5 LTC1067-50 12
LPA
LPB
6
BPA
11
BPB
7
10
HPA/NA HPB/NB
8
INV A
9
INV B
RH1 RB1 RL1
JPAGND
C1
10µF, 6.3V
C2, 0.1µF
JPVNEG
C7
0.1µF
CONNECT THIS JUMPER
FOR DUAL SUPPLIES
JP62
R62
JP52
R52
CONNECT THIS JUMPER
FOR SINGLE SUPPLIES.
THE LTC1067 HAS ON-CHIP
RESISTORS TO GENERATE
1/2 SUPPLY FOR AGND
D2
MBR0630T1
+
TP2
V–
C4
10µF
16V
TP8
R2
JP8
RL2
JP4
RB2
JP2
1 23
RH2
C13
R42 R32 R22
JP9
JP6
JP5
JP3
C5
R3
C8
0.1µF
3+ 8
1
2–
1/2
4 LT1498
C10
0.1µF
TP3
+ C9
VOA+
10µF
36V
TP5
VOUT
TP6
TP7VOA–
C11
+ 10µF
36V
TP11
R4
5+
7
6–
1/2
LT1498
JP7
C12
1067 F15
Figure 15. Schematic for the LTC1067/LTC1067-50 Demo Board
16