LT6700 Datasheet, PDF (16/20 Pages) Linear Technology – Micropower, Low Voltage, Dual Comparator with 400mV Reference

LT6700/LT6700HV
Applications Information
2 • V_REF
0.1µF
1.4V TO 18V
(I_S ≈ 10µA)
3.3µF
R_SET 499k
V_S
+INA OUTA
220k 220k*
T < T_SET
R_TH
T
LT6700-1
10k
–INB OUTB
GND
499k
3.3µF
6700123 F02
R_TH = 1M (e.g., YSI 44015, 1.00MΩ AT 25°C)
R_SET = R_TH AT T_SET
*RESISTANCE MAY REQUIRE OPTIMIZATION FOR OPERATION
OVER INTENDED R_TH AND V_SUPPLY RANGES
HYSTERESIS ZONE ≈0.4°C
Figure 2. Micropower Thermostat/Temperature Alarm
charges and discharges in a shallow, controlled fashion.
The multiplied reference signal also contains ripple that is
the hysteresis multiplied by the same factor, so additional
filtering is performed at the sense node of the bridge to
prevent comparator chatter in the section A comparator,
which is performing the actual conditional decision for
the circuit.
Instrumentation Grade Pulse Width Modulator (PWM)
Comparators with hysteresis are frequently employed
to make simple oscillator structures, and the LT6700/
LT6700HV lends itself nicely to forming a charge-balancing
PWM function. The circuit shown in Figure 3 forms a PWM
that is intended to transmit an isolated representation of a
voltage difference, rather like an isolated instrumentation
amplifier. The section B comparator is used to generate a
2V reference supply level for the CMOS NOT gate (inverter),
which serves as the precision switch element for the charge
balancer. The heart of the charge balancer is the section A
comparator, which is detecting slight charge or discharge
states on the 0.22µF “integration” capacitor as it remains
balanced at ≈400mV by feedback through the NOT gate.
The input sense voltage, V_IN, is converted to an imbal-
ance current that the NOT gate duty cycle is continually
correcting for, thus the digital waveform at the section A
comparator output is a PWM representation of V_IN with
respect to the 2V “full scale.” In this particular circuit, the
PWM information drives the LED of an opto-coupler, allow-
ing the V_IN information to be coupled across a dielectric
barrier. As an additional option to the circuit, the feedback
loop can be broken and a second opto-coupler employed to
provide the charge balance management. This configura-
tion allows for clocking the comparator output (externally
to this circuit) and providing synchronous feedback such
that a simple ∆∑ voltage-to-frequency conversion can be
formed if desired. Approximately 11-bit accuracy and noise
performance was observed in a one second integration
period for duty factors from 1% to 99%.
3V NOM (I_S < 3mA)
22µF
+
V_IN
0V TO 2V
–
10k**
5 • V_REF = 2V
Lithium ⁺
COIN CELL
470Ω
0.1µF
NC7S14
309k*
309k*
412k*
V_S
+INA OUTA
LT6700-1
–INB OUTB
0.22µF^†† _{100k* 100k*}
GND
10k
10k
0.1µF
750Ω
1
10k
2
†
6
*1% METAL FILM
**DELETE FOR PWM MODE
†_{CONNECT FOR PWM MODE}
††_{OPTIMIZED FOR 2kHz ΔΣ SAMPLING, fPWM(MAX) ≈ 0.6kHz}
6700123 F03
5
3V/5V
10k
PWM OUT
6 ^{(OR ΔΣ SENSE)}
MOC-207
5
3V/5V
750**
1
MOC-207**
2
ΔΣ
SAMPLE
IN
Figure 3. Isolated PWM or ∆∑ Converter
16
6700123fg