LTC6993-2_15 Datasheet, PDF (15/26 Pages) Linear Technology – Monostable Pulse Generator

LTC6993-1/LTC6993-2
LTC6993-3/LTC6993-4
OPERATION
Changing DIVCODE After Start-Up
Following start-up, the A/D converter will continue
monitoring V_DIV for changes. Changes to DIVCODE will
be recognized slowly, as the LTC6993 places a priority on
eliminating any “wandering” in the DIVCODE. The typical
delay depends on the difference between the old and
new DIVCODE settings and is proportional to the master
oscillator period.
t_DIVCODE = 16 • (∆DIVCODE + 6) • t_MASTER
A change in DIVCODE will not be recognized until it is
stable, and will not pass through intermediate codes. A
digital filter is used to guarantee the DIVCODE has settled
to a new value before making changes to the output. How-
ever, if the output pulse is active during the transition, the
pulse width can take on a value between the two settings.
DIV
500mV/DIV
TRIG
2V/DIV
512µs
OUT
4µs
2V/DIV
LTC6993-1
V⁺ = 3.3V
R_SET = 200k
256µs
200µs/DIV
69931234 F05a
Figure 5a. DIVCODE Change from 0 to 2
DIV
500mV/DIV
TRIG
2V/DIV
512µs
Start-Up Time
When power is first applied, the power-on reset (POR)
circuit will initiate the start-up time, t_START . The OUT pin
is held low during this time. The typical value for t_START
ranges from 0.5ms to 8ms depending on the master oscil-
lator frequency (independent of N_DIV):
t_START(TYP) = 500 • t_MASTER
During start-up, the DIV pin A/D converter must deter-
mine the correct DIVCODE before an output pulse can be
generated. The start-up time may increase if the supply
or DIV pin voltages are not stable. For this reason, it is
recommended to minimize the capacitance on the DIV
pin so it will properly track V⁺. Less than 100pF will not
extend the start-up time.
The DIVCODE setting is recognized at the end of the startup
up. If POL = 1, the output will transition high. Otherwise
(if POL = 0) OUT simply remains low. At this point, the
LTC6993 is ready to respond to rising/falling edges on
the TRIG input.
V⁺
TRIG
OUT
t_START
(TRIG IGNORED)
POL = 0
POL = 1
t_OUT
69931234 F06
Figure 6. Start-Up Timing Diagram
OUT
2V/DIV
256µs
LTC6993-1
V⁺ = 3.3V
R_SET = 200k
200µs/DIV
4µs
69931234 F05b
Figure 5b. DIVCODE Change from 2 to 0
69931234fb
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