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LTC4216_15 Datasheet, PDF (15/26 Pages) Linear Technology – Ultralow Voltage Hot Swap Controller
LTC4216
Applications Information
capacitors. A second timing cycle starts at time point 11
when the FB pin voltage exceeds 0.6V and the voltage
across the sense resistor drops below 25mV.RESET goes
high at the end of the second timing cycle (time point 12)
when TIMER reaches the VTMR(TH) threshold.
ELECTRONIC CIRCUIT
BREAKER ARMED
CHECK FOR GATE,
FILTER, TIMER,
SS < 0.2V
CHECK FOR GATE, FILTER,
TIMER, SS < 0.2V AND FAULT HIGH
START
GATE
RAMP
START 2ND TIMING CYCLE
(CHECK TIMER < 0.2V AND
FAULT HIGH)
ON GOES LOW
RESET GOES HIGH
RESET PULLED LOW
DUE TO POWER BAD
IN
RESET
MODE
12
3 4 56
78
9
10 11 12
13
VCC
SENSEP
ON
TIMER
SS
GATE
VOUT
RESET
0.8V
VTMR(TH)
2µA
10µA
10µA
1µA
TRACKS SS RAMP
(VGATE – VOUT) > VGS(TH)
20µA
VTMR(TH)
2µA
POWER GOOD
VFB > 0.6V
0.72V
0.4V
POWER BAD
VFB < 0.6V
PLUG-IN CYCLE
FIRST TIMING CYCLE
POWER-GOOD DELAY
SECOND TIMING CYCLE
4216 F08
Figure 8. Normal Power-Up/Power-Down Sequence
For more information www.linear.com/LTC4216
4216fa
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