LTC4160-1_15 Datasheet, PDF (15/32 Pages) Linear Technology – Switching Power Manager with USB On-The-Go And Overvoltage Protection

LTC4160/LTC4160-1
OPERATION
For very low-battery voltages, the battery charger acts like
a load and, due to limited input power, its current will tend
to pull V_OUT below the 3.6V instant-on voltage. To prevent
V_OUT from falling below this level, an undervoltage circuit
automatically detects that V_OUT is falling and reduces the
battery charge current as needed. This reduction ensures
that load current and voltage are always prioritized while
allowing as much battery charge current as possible. See
Over Programming the Battery Charger in the Applications
Information section.
The voltage regulation loop compensation is controlled by
the capacitance on V_OUT. A multilayer ceramic capacitor of
10µF is required for loop stability. Additional capacitance
beyond this value will improve transient response.
An internal undervoltage lockout circuit monitors V_BUS and
keeps the switching regulator off until V_BUS rises above
4.30V and is about 200mV above the battery voltage.
When both conditions are met, VBUSGD goes low and
the switching regulator turns on. Hysteresis on the UVLO
forces VBUSGD high and turns off the switching regulator
if V_BUS falls below 4.00V or to within 50mV of the battery
voltage. When this happens, system power at V_OUT will
be drawn from the battery via the ideal diode(s).
4.5
4.2
3.9
NO LOAD
3.6
3.3
300mV
3.0
2.7
2.4
2.4
2.7 3.0 3.3 3.6 3.9 4.2
BAT (V)
41601 F02
Figure 2. V_OUT vs BAT
Bidirectional PowerPath Switching Regulator –
Step-Up Mode
For USB On-The-Go applications, the bidirectional
PowerPath switching regulator acts as a step-up converter
to deliver power from V_OUT to V_BUS. The power from V_OUT
comes from the battery via the ideal diode(s). As a step-up
converter, the bidirectional switching regulator produces
5V on V_BUS and is capable of delivering at least 500mA.
USB On-The-Go can be enabled by either of the external
control pins, ENOTG or ID. Figure 3 shows the power flow
in step-up mode.
An undervoltage lockout circuit monitors V_OUT and prevents
step-up conversion until V_OUT rises above 2.8V. To prevent
backdriving of V_BUS when input power is available, the V_BUS
undervoltage lockout circuit prevents step-up conversion
if V_BUS is already greater than 4.3V at the time step-up
mode is enabled. The switching regulator is also designed
to allow true output disconnect by eliminating body diode
conduction of the internal PMOS switch. This allows V_BUS
to go to zero volts during a short-circuit condition or while
shutdown, drawing zero current from V_OUT.
The voltage regulation loop is compensated by the capaci-
tance on V_BUS. A 4.7µF multilayer ceramic capacitor is
required for loop stability. Additional capacitance beyond
this value will improve transient response. The V_BUS volt-
age has approximately 3% load regulation up to an output
current of 500mA. At light loads, the switching regulator
goes into Burst Mode^® operation. The regulator will deliver
power to V_BUS until it reaches 5.1V after which the NMOS
and PMOS switches shut off. The regulator delivers power
again to V_BUS once it falls below 5.1V.
The switching regulator features both peak inductor and
average output current limit. The peak current-mode
architecture limits peak inductor current on a cycle-by-
cycle basis. The peak current limit is equal to V_BUS/2Ω to
a maximum of 1.8A so that in the event of a sudden short
circuit, the current limit will fold back to a lower value.
In step-up mode, the voltage on CLPROG represents the
average output current of the switching regulator when
a programming resistor and an averaging capacitor are
connected from CLPROG to GND. With a 3.01k resistor
on CLPROG, the bidirectional switching regulator has an
output current limit of 680mA. As the output current ap-
proaches this limit, CLPROG servos to 1.15V and V_BUS falls
rapidly to V_OUT. When V_BUS is close to V_OUT there may not
be sufficient negative slope on the inductor current when
the PMOS switch is on to balance the rise in the inductor
41601f
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