LTC3547B_15 Datasheet, PDF (15/16 Pages) Linear Technology – Dual Monolithic 300mA Synchronous Step-Down Regulator

APPLICATIO S I FOR ATIO
LTC3547B
V_OUT,
AC-COUPLED
100mV/DIV
I_L
200mA/DIV
I_LOAD
200mA/DIV
10μs/DIV
V_IN = 3.6V
V_OUT = 1.8V
I_LOAD = 20mA TO 300mA
V_OUT,
AC-COUPLED
100mV/DIV
I_L
200mA/DIV
I_LOAD
200mA/DIV
10μs/DIV
V_IN = 3.6V
V_OUT = 2.5V
I_LOAD = 20mA TO 300mA
Figure 4c. Transient Response
3547b F04c
PACKAGE DESCRIPTIO
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702 Rev B)
0.61 ±0.05
(2 SIDES)
2.55 ±0.05
1.15 ±0.05
0.25 ± 0.05
0.70 ±0.05
0.50 BSC
2.20 ±0.05
(2 SIDES)
PACKAGE
OUTLINE
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
3.00 ±0.10
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.05
TYP
R = 0.115
TYP
5
0.40 ± 0.10
8
2.00 ±0.10
(2 SIDES)
0.75 ±0.05
0.56 ± 0.05
(2 SIDES)
4
0.25 ± 0.05
PIN 1
R = 0.20 OR
0.25 × 45°
CHAMFER
1
(DDB8) DFN 0905 REV B
0.50 BSC
0 – 0.05
2.15 ±0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
3547bfb
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