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LTC3305_15 Datasheet, PDF (15/28 Pages) Linear Technology – Lead-Acid Battery Balancer
LTC3305
Operation
Once the CBOOST capacitor has 6.95V across it, balancing
begins. When CBOOST is charged to 8.45V, the charge
pump operation is disabled and CFLY remains connected
to CBOOST. Charge pump operation resumes when CBOOST
discharges to 8.25V.
Undervoltage and Overvoltage Fault Detection
The undervoltage and overvoltage thresholds can be
programmed using the resistor at the ISET pin in con-
junction with resistors at the VL and VH pins. The voltage
present at the VL or VH pin programs the corresponding
fault threshold to 10× that voltage for each battery in the
stack. An internal amplifier accurately gains up the voltage
at the VL and VH pins and shifts the threshold voltage to
the appropriate battery common mode level. The VL and
VH pins have a programming range from 0.4V to 1.6V.
The internal undervoltage and overvoltage comparators
may not trip correctly for a program voltage outside this
range. An internal clamp prevents the thresholds from
being programmed to greater than 20V.
When an undervoltage or overvoltage fault condition is
detected, the corresponding UVFLT or OVFLT pin is pulled
to GND. The balancing operation is not interrupted during
this time. If an undervoltage or overvoltage fault condition
goes away during the balancing operation, the correspond-
ing fault pin returns to its high impedance state.
If the undervoltage and overvoltage fault detection is not
needed, the VL and VH pins must be tied to GND. The UVFLT
and OVFLT pins may either be tied to GND or left floating.
Low Voltage Regulator
The LTC3305 has an always on regulator that provides
2.5V at the VREG pin. The VREG pin may be driven externally
up to 5.5V. The VREG pin cannot sink current and will not
pull down an externally applied voltage. The regulator can
source up to 3mA of current. If more than 3mA of current
is drawn from the regulator, the VREG voltage will drop
below its undervoltage threshold, disabling the LTC3305
and terminating the balancing operation. The balancing
operation restarts when the regulator recovers from its
undervoltage state. In short circuit, the VREG current is
limited to 15mA. The VREG pin should be decoupled with
at least a 1µF capacitor to GND.
Thermal Shutdown
The LTC3305 has an overtemperature detect circuit that
shuts down the balancing operation when the internal
silicon junction temperature exceeds 155°C. The LTC3305
resumes balancing when the temperature drops to 145°C.
In thermal shutdown, the low voltage regulator remains
powered.
Balancing Battery Stacks with Two or Three Batteries
The LTC3305 can also be configured to balance battery
stacks of two or three batteries. The state of the enable pins
tells the LTC3305 to select the correct switch sequencing.
For a two battery stack, the LTC3305 must be enabled
with EN1 = 0 and EN2 = 1. For a three battery stack, the
LTC3305 must be enabled with EN1 = 1 and EN2 = 0. The
external NMOS switch arrangements for a two-battery
and three-battery application are shown in Figures 3 and
4 respectively. If pin NGATE6 is unused, it must be con-
nected to the BOOST pin. All other unused NGATE pins
must be connected to V4 as shown in Figures 3 and 4.
A two battery stack is deemed balanced if the termination
sense comparator senses the voltage difference between
the auxiliary cell and the battery is less than VTERMINATE
on three successive cycles when the auxiliary cell and a
battery are connected using only the bottom switches.
In the case of a three battery stack, four successive cycles
are required to deem the stack balanced.
For more information www.linear.com/LTC3305
3305f
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