LTC3122_15 Datasheet, PDF (15/26 Pages) Linear Technology – 15V, 2.5A Synchronous Step-Up DC/DC Converter with Output Disconnect

LTC3122
Applications Information
G_EA = g_ma • R_O ≈ 950V/V
(Not Adjustable; g_ma = 95µS, R_O ≈ 10MΩ)
G_MP
= g_mp
=
ΔI_L
ΔV_C
≈ 3.4S
(Not Adjustable)
G_POWER
=
ΔV_OUT
ΔI_L
= ^{η • VIN}
2 •I_OUT
Combining the two equations above yields:
G_DC
=
G_MP
• G_POWER
≈
1.7 • η •
I_OUT
V_IN
V/V
Converter efficiency η will vary with I_OUT and switching
frequency ƒ_OSC as shown in the typical performance
characteristics curves.
Output Pole: P1 =
2
Hz
2 • π • R_L • C_OUT
Error Amplifier Pole: P2 =
1
Hz
2 • π • R_O • (C_C + C_F )
Error Amplifier Zero: Z1 =
1
Hz
2 • π • R_C • C_C
ESR Zero: Z2 =
1
Hz
2 • π • R_ESR • C_OUT
RHP Zero: Z3 =
2
•
V_IN2 • R_L
π • V_OUT ²
•
L
Hz
High Frequency Pole: P3 > ^ƒOSC
3
Phase Lead Zero: Z4 =
1
Hz
2 • π • (R1+R_PL ) • C_PL
Phase
Lead
Pole:
P4
=
2
•
π
•
1
⎛ R1• R2
⎝⎜ R1+ R2
+
R_PL
⎞
⎠⎟
•
C_PL
Hz
Error Amplifier Filter Pole:
P5
=
2
•
π
•
R_C
1
⎛
•⎜
⎝
C_C
C_C
• C_F
+ C_F
⎞
⎟
⎠
Hz
The current mode zero (Z3) is a right half plane zero
which can be an issue in feedback control design, but is
manageable with proper external component selection.
As a general rule, the frequency at which the open-loop
gain of the converter is reduced to unity, known as the
crossover frequency ƒ_C, should be set to less than one
third of the right half plane zero (Z3), and under one eighth
of the switching frequency ƒ_OSC. Once ƒ_C is selected, the
values for the compensation components can be calculated
using a bode plot of the power stage or two generally valid
assumptions: P1 dominates the gain of the power stage
for frequencies lower than ƒ_C and ƒ_C is much higher than
P2. First calculate the power stage gain at ƒ_C, G_ƒC in V/V.
Assuming the output pole P1 dominates G_ƒC for this range,
it is expressed by:
G_ƒC ≈
G_{DC V/V}
1+
⎛
⎝⎜
ƒ_C
P1
⎞²
⎠⎟
Decide how much phase margin (Φ_m) is desired. Greater
phase margin can offer more stability while lower phase mar-
gin can yield faster transient response. Typically, Φ_m ≈ 60°
is optimal for minimizing transient response time while
allowing sufficient margin to account for component vari-
ability. Φ₁ is the phase boost of Z1, P2, and P5 while Φ₂ is
the phase boost of Z4 and P4. Select Φ₁ and Φ₂ such that
Φ₁
≤
74°
;
Φ₂
≤
⎛
⎜2
•
tan^−1
⎝
V_OUT
1.2V
⎞
⎟
⎠
−
90°
and
Φ₁
+
Φ₂
=
Φ_m
+
tan^{−1⎛⎝⎜}
ƒ_C
Z3
⎞
⎠⎟
where V_OUT is in V and ƒ_C and Z3 are in kHz.
Setting Z1, P5, Z4, and P4 such that
Z1=
ƒ_C
a₁
,
P5
=
ƒ_C
a₁, Z4 =
ƒ_C
a₂
,
P4
=
ƒ_C
a₂
allows a₁ and a₂ to be determined using Φ₁ and Φ₂
a₁ =
tan²
⎛
⎝⎜
Φ₁
+ 90°
2
⎠⎟⎞^,
a₂
=
tan²
⎛
⎝⎜
Φ₂
+90°
2
⎞
⎠⎟
3122fa
For more information www.linear.com/LTC3122
15