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LTC2641 Datasheet, PDF (15/20 Pages) Linear Technology – 16-/14-/12-Bit VOUT DACs in 3mm × 3mm DFN | |||
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LTC2641/LTC2642
APPLICATIONS INFORMATION
such as the LTC6078 is suitable, if the application does not
require linear operation very near to GND, or zero scale
(Figure 2). The LTC6078 typically swings to within 1mV
of GND if it is not required to sink any load current. For an
LSB size of 38μV, 1mV represents 26 missing codes near
zero scale. Linearity will be degraded over a somewhat
larger range of codes above GND. It is also unavoidable
that settling time and transient performance will degrade
whenever a single supply ampliï¬er is operated very close
to GND, or to the positive supply rail.
The small LSB size of a 16-bit DAC, coupled with the tight
accuracy speciï¬cations on the LTC2641/LTC2642, means
that the accuracy and input speciï¬cations for the external
op amp are critical for overall DAC performance.
Op Amp Speciï¬cations and Unipolar DAC Accuracy
Most op amp accuracy speciï¬cations convert easily to
DAC accuracy.
Op amp input bias current on the noninverting (+) input is
equivalent to an IL loading the DAC VOUT pin and therefore
produces a DAC zero-scale error (ZSE) (see Unbuffered
Operation):
ZSE = âIB(IN+) ⢠ROUT [Volts]
In 16-bit LSBs:
( ) ZSE = âIB IN+
â¢
6.2k
â¢
â
ââ
66k
VREF
â
â â
[LSB]
Op amp input impedance, RIN, is equivalent to an RL
loading the LTC2641/LTC2642 VOUT pin, and produces a
gain error of:
GE =
â66k
1+
â
ââ
6.2kâ
RIN â â
[LSB]
Op amp offset voltage, VOS, corresponds directly to DAC
zero code offset error, ZSE:
ZSE
=
VOS
â¢
66k
VREF
[LSB]
Temperature effects also must be considered. Over the
â40°C to 85°C industrial temperature range, an offset
voltage temperature coefï¬cient (referenced to 25°C) of
0.6μV/°C will add 1LSB of zero-scale error. Also, IBIAS and
the VOFFSET error it causes, will typically show signiï¬cant
relative variation over temperature.
Op amp open-loop gain, AVOL, contributes to DAC gain
error (GE):
GE =
66k
A VOL
[LSB]
Op amp input common mode rejection ratio (CMRR) is an
input-referred error that corresponds to a combination of
gain error (GE) and INL, depending on the op amp archi-
tecture and operating conditions. A conservative estimate
of total CMRR error is:
[ ] Error
=
â âCMRRâ â
â10ââ 20 â â â
â
â
â
â
â¢
â
ââ
VCMRR _RANGE â
VREF â â
â¢
66k
LSB
where VCMRR_RANGE is the voltage range that CMRR (in
dB) is speciï¬ed over. Op amp Typical Performance Charac-
teristics graphs are useful to predict the impact of CMRR
errors on DAC performance. Typically, a precision op amp
will exhibit a fairly linear CMRR behavior (corresponding
to DAC gain error only) over most of the common mode
input range (CMR), and become nonlinear and produce
signiï¬cant errors near the edge of the CMR.
Rail-to-rail input op amps are a special case, because they
have 2 distinct input stages, one with CMR to GND and
the other with CMR to V+. This results in a âcrossoverâ
CM input region where operation switches between the
two input stages.
The LTC6078 rail-to-rail input op amp typically exhibits
remarkably low crossover linearity error, as shown in the
VOS vs VCM Typical Performance Characteristics graphs
(see the LTC6078 data sheet). Crossover occurs at CM
inputs about 1V below V+, and an LTC6078 operating as
a unipolar DAC buffer with VREF = 2.5V and V+ = 5V will
typically add only about 1LSB of GE and almost no INL
error due to CMRR. Even in a full rail-to-rail application,
with VREF = V+ = 5V, a typical LTC6078 will add only about
1LSB of INL at 16-bits.
26412f
15
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