LT3475 Datasheet, PDF (15/20 Pages) Linear Technology – Dual Step-Down l 1.5A LED Driver

LT3475/LT3475-1
APPLICATIONS INFORMATION
LT3475 to maintain diode current regulation with PWM
pulse widths as short as 7.5 switching cycles (12.5μs for
f_SW = 600kHz). Maximum PWM period is determined by
the system and is unlikely to be longer than 12ms. Using
PWM periods shorter than 100μs is not recommended.
The maximum PWM dimming ratio (PWM_RATIO) can be
calculated from the maximum PWM period (t_MAX) and
minimum PWM pulse width (t_MIN) as follows:
t_MAX/t_MIN = PWM_RATIO
Total dimming ratio (DIM_RATIO) is the product of the PWM
dimming ratio and the current dimming ratio.
Example:
I_MAX = 1A, I_MIN = 0.1A, t_MAX = 9.9ms
t_MIN = 3.3μs (f_SW = 1.4MHz)
I_RATIO = 1A/0.1A =10:1
PWM_RATIO = 9.9ms/3.3μs = 3000:1
DIM_RATIO = 10 • 3000 = 30000:1
To achieve the maximum PWM dimming ratio, use the
circuit shown in Figure 9. This allows PWM pulse widths
as short as 4.5 switching cycles (7.5μs for f_SW = 600kHz).
Note that if you use the circuit in Figure 9, the rising edge
of the two PWM signals must align within 100ns.
PWM1
220pF
1M
R_T
V_C
LT3475
R_T
GND
3475 F09
3.3nF
10k
0.1μF
Figure 9. Extending the PWM Dimming Range
Layout Hints
As with all switching regulators, careful attention must
be paid to the PCB layout and component placement. To
maximize efficiency, switch rise and fall times are made
as short as possible. To prevent electromagnetic interfer-
ence (EMI) problems, proper layout of the high frequency
switching path is essential. The voltage signal of the SW
and BOOST pins have sharp rise and fall edges. Minimize
the area of all traces connected to the BOOST and SW
pins and always use a ground plane under the switching
regulator to minimize interplane coupling. In addition, the
ground connection for frequency setting resistor R_T and
capacitors at V_C1, V_C2 pins (refer to the Block Diagram)
should be tied directly to the GND pin and not shared
with the power ground path, ensuring a clean, noise-free
connection.
PWM1
SHDN
PWM2
V_IN
VIA TO LOCAL GND PLANE
3475 F10
Figure 10. Recommended Component Placement
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