LTC5540_15 Datasheet, PDF (14/16 Pages) Linear Technology – 600MHz to 1.3GHz High Dynamic Range Downconverting Mixer

LTC5540
Applications Information
The IFBIAS pin (pin 20) is available for reducing the DC
current consumption of the IF amplifier, at the expense of
IIP3. This pin should be left open-circuited for optimum
performance. The internal bias circuit produces a 4mA
reference for the IF amplifier, which causes the amplifier
to draw approximately 96mA. If resistor R1 is connected
to pin 20 as shown in Figure 7, a portion of the reference
current can be shunted to ground, resulting in reduced
IF amplifier current. For example, R1 = 1kΩ will shunt
away 1.5mA from pin 20 and the IF amplifier current will
be reduced by 38% to approximately 59mA. The nominal,
open-circuit DC voltage at pin 20 is 2.1V. Table 6 lists RF
performance at 900MHz versus IF amplifier current.
The SHDN pin must be pulled high or low. If left floating,
then the on/off state of the IC will be indeterminate. If a
three-state condition can exist at the SHDN pin, then a
pull-up or pull-down resistor must be used.
V_CC2
6
LTC5540
SHDN
5
500Ω
Table 6. Mixer Performance with Reduced IF Amplifier Current
(RF = 900MHz, High-Side LO, IF = 190MHz, V_CC = V_CCIF = 3.3V)
R1
I_CCIF
G_C
IIP3
P1dB
NF
(kΩ)
(mA)
(dB)
(dBm) (dBm)
(dB)
OPEN
96
7.9
25.9
11.0
9.9
4.7
86
7.7
25.3
11.1
9.9
2.2
77
7.6
24.7
11.3
9.9
1
59
7.3
23.0
10.8
9.8
(RF = 900MHz, Low-Side LO, IF = 190MHz, V_CC = V_CCIF = 3.3V)
R1
I_CCIF
G_C
IIP3
P1dB
NF
(kΩ)
(mA)
(dB)
(dBm) (dBm)
(dB)
OPEN
96
7.0
24.4
11.0
10.6
4.7
86
6.9
23.4
11.0
10.6
2.2
77
6.8
23.2
11.1
10.6
1
59
6.3
22.4
10.5
10.5
Shutdown Interface
Figure 11 shows a simplified schematic of the SHDN pin
interface. To disable the chip, the SHDN voltage must be
higher than 3.0V. If the shutdown function is not required,
the SHDN pin should be connected directly to GND. The
voltage at the SHDN pin should never exceed the power
supply voltage (V_CC) by more than 0.3V. If this should
occur, the supply current could be sourced through the
ESD diode, potentially damaging the IC.
5540 F11
Figure 11. Shutdown Input Circuit
Supply Voltage Ramping
Fast ramping of the supply voltage can cause a current
glitch in the internet ESD protection circuits. Depending on
the supply inductance, this could result in a supply voltage
transient that exceeds the maximum rating. A supply voltage
ramp time of greater than 1ms is recommended.
5540f
14