LTC3822-1_15 Datasheet, PDF (14/24 Pages) Linear Technology – No RSENSE, Low Input Voltage, Synchronous Step-Down DC/DC Controller

LTC3822-1
APPLICATIONS INFORMATION
an external voltage V_X, according to a ratio set by a resis-
tor divider at TRACK/SS pin (Figure 4a). The ratiometric
relation between V_OUT and V_X is (Figure 4c):
V_{OUT =} R_{TA •} R_A + R_B
V_X R_A R_TA + R_TB
For coincident tracking (V_OUT = V_X during start-up),
R_TA = R_A, R_TB = R_B
V_X should always be greater than V_OUT when using the
tracking function of TRACK/SS pin.
The internal current source (1µA), which is for external
soft-start, will cause a tracking error at V_OUT. For example,
if a 59k resistor is chosen for R_TA, the R_TA current will be
about 10µA (600mV/59k). In this case, the 1µA internal
current source will cause about 10% (1µA/10µA • 100%)
tracking error, which is about 60mV (600mV • 10%)
referred to V_FB. This is acceptable for most applications.
If a better tracking accuracy is required, the value of R_TA
should be reduced.
V_X
R_TB
R_TA
LTC3822-1
V_FB
TRACK/SS
V_OUT
R_B
R_A
38221 F05a
Figure 4a. Using the TRACK/SS Pin to Track V_X
Table 1 summarizes the different states in which TRACK/SS
can be used.
Table 1. The States of the TRACK/SS Pin
TRACK/SS Pin
FREQUENCY
Capacitor C_SS
V_IN
External Soft-Start
Internal Soft-Start
Resistor Divider
V_OUT Tracking an External Voltage V_X
Phase-Locked Loop and Frequency Synchronization
The LTC3822-1 has a phase-locked loop (PLL) comprised
of an internal voltage-controlled oscillator (VCO) and a
phase detector. This allows the turn-on of the external top
MOSFET to be locked to the rising edge of an external clock
signal applied to the SYNC/MODE pin. The phase detector
is an edge sensitive digital type that provides zero degrees
phase shift between the external and internal oscillators.
This type of phase detector does not exhibit false lock to
harmonics of the external clock.
The output of the phase detector is a pair of comple-
mentary current sources that charge or discharge the
external filter network connected to the PLLLPF pin. The
relationship between the voltage on the PLLLPF pin and
operating frequency, when there is a clock signal applied
to SYNC/MODE, is shown in Figure 5 and specified in the
electrical characteristics table. Note that the LTC3822-1
can only be synchronized to an external clock whose fre-
quency is within range of the LTC3822-1’s internal VCO,
which is nominally 200kHz to 1MHz. This is guaranteed,
V_X
V_X
V_OUT
V_OUT
14
TIME
(4b) Coincident Tracking
TIME
38221 F04b,c
(4c) Ratiometric Tracking
Figure 4b and 4c. Two Different Modes of Output Voltage Tracking
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