LTC3606B_15 Datasheet, PDF (14/20 Pages) Linear Technology – 800mA Synchronous Step-Down DC/DC with Average Input Current Limit

LTC3606B
APPLICATIONS INFORMATION
PC Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3606B. These items are also illustrated graphically
in the layout diagrams of Figures 3a and 3b. Check the
following in your layout:
1. Does the capacitor C_IN connect to the power V_IN (Pin 5)
and GND (Pin 9) as closely as possible? This capacitor
provides the AC current of the internal power MOSFETs
and their drivers.
2. Are the respective C_OUT and L closely connected? The
(–) plate of C_OUT returns current to GND and the (–)
plate of C_IN.
3. The resistor divider, R1 and R2, must be connected
between the (+) plate of C_OUT and a ground sense line
terminated near GND (Pin 9). The feedback signal V_FB
should be routed away from noisy components and
traces, such as the SW line (Pin 4), and their trace
length should be minimized.
4. Keep sensitive components away from the SW pin, if
possible. The input capacitor C_IN, C_LIM and the resistors
R1, R2, and R_LIM should be routed away from the SW
traces and the inductors.
5. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small
signal components returning to the GND pin at a single
point. These ground traces should not share the high
current path of C_IN or C_OUT.
6. Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise
of power components. These copper areas should be
connected to V_IN or GND.
V_IN
2.5V TO 5.5V
V_IN
SW
C_IN
R_PGD
LTC3606B
RUN
PGOOD
V_FB
R_LIM
RLIM
GND
C_LIM
L1
C_F
R2
R1
V_OUT
C_OUT
BOLD LINES INDICATE HIGH CURRENT PATHS
3606B F03a
Figure 3a. LTC3606B Layout Diagram (See Board Layout Checklist)
3606bfb
14