LTC3440_15 Datasheet, PDF (14/20 Pages) Linear Technology – Micropower Synchronous Buck-Boost DC/DC Converter

LTC3440
APPLICATIONS INFORMATION
f_POLE1 ≈
2
•
π
1
• 32e³
•R1•
C_P1
Hz
Which is extremely close to DC
f_{ZERO 1}=
2•
π
1
•R_Z
Hz
• C_P1
f_ZERO2
=
2•
1
Hz
π •R1 • C_Z1
f_POLE2 =
1
2 • π •R_Z
• C_{P 2}
Hz
ERROR
AMP
1.22V
FB
9
V_C
C_P1
10
V_OUT
R1
R2
3440 F07
Figure 7. Error Amplifier with Type I Compensation
as the traces and external components. Following the
recommendations for output voltage >4.3V and input
voltage >4.5V will improve this condition. Additional
short-circuit protection can be accomplished with some
external circuitry.
In an overload or short-circuit condition the LTC3440 volt-
age loop opens and the error amp control voltage on the V_C
pin slams to the upper clamp level. This condition forces
boost mode operation in order to attempt to provide more
output voltage and the IC hits a peak switch current limit of
2.7A. When switch current limit is reached switches B and
D turn on for the remainder of the cycle to reverse the volts
• seconds on the inductor. Although this prevents current
run away, this condition produces four switch operation
producing a current foldback characteristic and the aver-
age input current drops. The IC is trimmed to guarantee
greater than 1A average input current to meet the maximum
load demand, but in a short-circuit or overload condition
the foldback characteristic will occur producing higher
peak switch currents. To minimize this affect during this
condition the following circuits can be utilized.
ERROR
AMP
V_OUT
1.22V
FB
9
R1
C_Z1
V_C
R_Z ^CP1
R2
10
C_P2
3440 F08
Figure 8. Error Amplifier with Type III Compensation
Short-Circuit Improvements
The LTC3440 is current limited to 2.7A peak to protect the
IC from damage. At input voltages above 4.5V a current
limit condition may produce undesirable voltages to the
IC due to the series inductance of the package, as well
Restart Circuit
For a sustained short-circuit the circuit in Figure 9 will force
a soft-start condition. The only design constraint is that
R2/C2 time constant must be longer than the soft-start
components R1/C1 to ensure start-up.
V_IN
SOFT-START
SO/SS
C1
4.7nF
R1
1M
D1
1N4148
M2
NMOS
VN2222
C2
10nF
R2
1M
M1
NMOS
VN2222
V_OUT
3440 F09
Figure 9. Soft-Start Reset Circuitry for a Sustained Short-Circuit
3440fc
14
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