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LTC1438 Datasheet, PDF (14/32 Pages) Linear Technology – Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators
LTC1438/LTC1439
APPLICATIONS INFORMATION
The peak-to-peak drive levels are set by the INTVCC volt-
age. This voltage is typically 5V during start-up (see
EXTVCC Pin Connection). Consequently, logic level thresh-
old MOSFETs must be used in most LTC1438/LTC1439
applications. The only exception is applications in which
EXTVCC is powered from an external supply greater than
8V (must be less than 10V), in which standard threshold
MOSFETs (VGS(TH) < 4V) may be used. Pay close attention
to the BVDSS specification for the MOSFETs as well; many
of the logic level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the "ON"
resistance RSD(ON), reverse transfer capacitance CRSS,
input voltage and maximum output current. When the
LTC1438/LTC1439 are operating in continuous mode the
duty cycles for the top and bottom MOSFETs are given by:
Main Switch Duty Cycle = VOUT
VIN
Synchronous Switch Duty Cycle = (VIN – VOUT)
VIN
The MOSFET power dissipations at maximum output
current are given by:
PMAIN
=
VOUT
VIN
(IMAX)2(1+
)δ RDS(ON)
+
k(VIN)1.85 (IMAX)(CRSS)(f)
( ) ( ) PSYNC
=
VIN
– VOUT
VIN
IMAX 2
1+ δ
RDS(ON)
where δ is the temperature dependency of RDS(ON) and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I2R losses while the topside
N-channel equation includes an additional term for transi-
tion losses, which are highest at high input voltages. For
VIN < 20V the high current efficiency generally improves
with larger MOSFETs, while for VIN > 20V the transition
losses rapidly increase to the point that the use of a higher
RDS(ON) device with lower CRSS actual provides higher
efficiency. The synchronous MOSFET losses are greatest
at high input voltage or during a short circuit when the duty
cycle in this switch is nearly 100%. Refer to the Foldback
Current Limiting section for further applications information.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized RDS(ON) vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs. CRSS is usually specified in the MOSFET
characteristics. The constant k = 2.5 can be used to
estimate the contributions of the two terms in the main
switch dissipation equation.
The Schottky diode D1 shown in Figure 1 serves two
purposes. During continuous synchronous operation, D1
conducts during the dead-time between the conduction of
the two large power MOSFETs. This prevents the body
diode of the bottom MOSFET from turning on and storing
charge during the dead-time, which could cost as much as
1% in efficiency. During low current operation, D1 oper-
ates in conjunction with the small top MOSFET to provide
an efficient low current output stage. A 1A Schottky is
generally a good compromise for both regions of opera-
tion due to the relatively small average current.
CIN and COUT Selection
In continuous mode, the source current of the top
N-channel MOSFET is a square wave of duty cycle VOUT/
VIN. To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
[ ] ( ) CIN Required IRMS ≈ IMAX
VOUT VIN – VOUT
VIN
1/ 2
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturer’s ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design. Always
consult the manufacturer if there is any question.
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