LT1940 Datasheet, PDF (14/20 Pages) Linear Technology – Dual Monolithic 1.4A, 1.1MHz Step-Down Switching Regulator

LT1940
APPLICATIO S I FOR ATIO
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board (PCB) layout. Figure 8
shows the high-di/dt paths in the buck regulator circuit.
Note that large, switched currents flow in the power
switch, the catch diode and the input capacitor. The loop
formed by these components should be as small as
possible. These components, along with the inductor and
output capacitor, should be placed on the same side of the
circuit board, and their connections should be made on
that layer. Place a local, unbroken ground plane below
these components, and tie this ground plane to system
ground at one location, ideally at the ground terminal of the
output capacitor C2. Additionally, the SW and BOOST
nodes should be kept as small as possible. Figure 9 shows
recommended component placement with trace and via
locations.
Thermal Considerations
The PCB must also provide heat sinking to keep the
LT1940 cool. The exposed metal on the bottom of the
package must be soldered to a ground plane. This ground
should be tied to other copper layers below with thermal
vias; these layers will spread the heat dissipated by the
LT1940. Place additional vias near the catch diodes.
Adding more copper to the top and bottom layers and tying
this copper to the internal planes with vias can reduce
thermal resistance further. With these steps, the thermal
resistance from die (or junction) to ambient can be re-
duced to θ_JA = 45°C/W.
The power dissipation in the other power components—
catch diodes, boost diodes and inductors,␣ cause addi-
tional copper heating and can further increase what the IC
sees as ambient temperature. See the LT1767 data sheet’s
Thermal Considerations section.
V_IN SW
GND
(a)
V_IN SW
GND
(b)
V_SW
V_IN SW
L1
I_C1
C1
GND
D1
C2
1940 F08
(c)
Figure 8. Subtracting the Current when the Switch is ON (a) From the Current when the Switch is OFF (b) Reveals the Path
of the High Frequency Switching Current (c) Keep This Loop Small. The Voltage on the SW and BOOST Nodes will also be
Switched; Keep these Nodes as Small as Possible. Finally, Make Sure the Circuit is Shielded with a Local Ground Plane.
1940i
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