LTC4364-1_15 Datasheet, PDF (13/24 Pages) Linear Technology – Surge Stopper with Ideal Diode

LTC4364-1/LTC4364-2
APPLICATIONS INFORMATION
V_TMR (V)
1.35
I_TMR = 5µA
I_TMR = 5µA
1.25
V_CC – V_OUT = 75V
(I_TMR = 50µA)
V_CC – V_OUT = 10V
(I_TMR = 8µA)
V_CC – V_OUT ⁰
= 75V
t_FLT
25ms/µF
=10V
t_WARNING
20ms/µF
t_FLT
156ms/µF
t_WARNING
20ms/µF
(3a) Overvoltage Fault Timer Current
V_TMR (V)
1.35
1.25
V_CC – V_OUT = 75V
(I_TMR = 260µA)
V_CC – V_OUT = 10V
(I_TMR = 42µA)
TIME
0
V_CC – V_OUT
= 75V
=10V
t_FLT
4.8ms/µF
t_WARNING
0.38ms/µF
t_FLT
29.8ms/µF
TIME
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t_WARNING
2.38ms/µF
(3b) Overcurrent Fault Timer Current
Figure 3. Fault Timer Current of the LTC4364
When the voltage at the TMR pin, V_TMR, reaches 1.25V,
the FLT pin pulls low to indicate the detection of a fault
condition and provide warning of the impending power
loss. In the case of an overvoltage fault, the timer current
then switches to a fixed 5μA. The interval between FLT
asserting low and the MOSFET M1 turning off is given by:
t _WARNING
=
C_TMR • 100mV
5µA
This constant early warning period allows the load to
perform necessary backup or housekeeping functions
before the supply is cut off. After V_TMR crosses the 1.35V
threshold, the pass device M1 turns off immediately. Note
that during an overcurrent event, the timer current is not
reduced to 5μA after V_TMR has reached 1.25V threshold,
since it would lengthen the overall fault timer period and
cause more stress on the power transistor during an
overcurrent event.
Assuming V_CC – V_OUT remains constant, the on-time of
HGATE during an overvoltage fault is:
t_OV
=
C_TMR •1.25V
I_TMR(UP)OV
+
C_TMR •100mV
5µV
and that during an overcurrent fault is:
t_OC
=
C_TMR •1.35V
I_TRM(UP)OC
If the fault condition disappears after TMR reaches 1.25V
but is lower than 1.35V, the TMR pin is discharged by 2μA.
When TMR drops to 0.15V, the FLT pin resets to a high
impedance state.
Cool Down Period and Restart
As soon as TMR reaches 1.35V and HGATE pulls low in
a fault condition, the TMR pin starts discharging with a
2μA current. When the TMR pin voltage drops to 0.15V,
TMR charges with 2μA. When TMR reaches 1.35V, it starts
discharging again with 2μA. This pattern repeats 32 times
to form a long cool down timer period before retry (Fig-
ure 4). At the end of the cool down period (when the TMR
pin voltage drops to 0.15V the 32nd time), the voltage at
the OV pin is checked. If the OV voltage is above its 1.25V
threshold, retry is inhibited and the HGATE pin remains
low. If the OV pin voltage is below 1.25V minus the OV
hysteresis, the LTC4364-2 retries, pulling the HGATE pin
up and turning on the pass device M1. The FLT pin will
then go to a high impedance state. The total cool down
timer period is given by:
t_COOL
=
63
•
C_TMR •
2µA
1.2V
The latch-off version, LTC4364-1, latches the HGATE and
FLT pins low after a fault timeout. It also generates the
cool down TMR pulses as shown in Figure 4, but does
not retry after the cool down period. There are two ways
to restart the part. The first method is to pull the UV pin
below 0.6V momentarily (>10μs) after the cool down timer
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