LTC1608_15 Datasheet, PDF (13/20 Pages) Linear Technology – High Speed, 16-Bit, 500ksps Sampling A/D Converter with Shutdown

LTC1608
APPLICATIO S I FOR ATIO
3 ^VREF
2.500V
R1
7.5k _BANDGAP
REFERENCE
4.375V
4 ^REFCOMP
REFERENCE
AMP
22µF
5 ^AGND
R2
12k
R3
16k
LTC1608
1608 F12a
Figure 12a. LTC1608 Reference Circuit
5V
V_IN
LT1019A-2.5
V_OUT
+
ANALOG
INPUT
1 _AIN+
2 _AIN–
3
V_REF
LTC1608
4 _REFCOMP
22µF
0.1µF
5
AGND
1608 F12b
Figure 12b. Using the LT1019-2.5 as an External Reference
A 7.5k resistor is in series with the output so that it can be
easily overdriven by an external reference or other
circuitry (see Figure 12b). The reference amplifier gains
the voltage at the V_REF pin by 1.75 to create the required
internal reference voltage. This provides buffering
between the V_REF pin and the high speed capacitive DAC.
The reference amplifier compensation pin (REFCOMP, Pin
4) must be bypassed with a capacitor to ground. The
reference amplifier is stable with capacitors of 22µF or
greater. Using a 0.1µF ceramic in parallel is recommended.
The V_REF pin can be driven with a DAC or other means
shown in Figure 13. This is useful in applications where the
peak input signal amplitude may vary. The input span of
the ADC can then be adjusted to match the peak input
signal, maximizing the signal-to-noise ratio. The filtering
of the internal LTC1608 reference amplifier will limit
the bandwidth and settling time of this circuit. A settling
time of 20ms should be allowed for after a reference
adjustment.
LTC1450
ANALOG INPUT
2V TO 2.7V
DIFFERENTIAL
2V TO 2.7V
1 _AIN+
2 _AIN–
LTC1608
3
V_REF
22µF
4
REFCOMP
5
AGND
1608 F13
Figure 13. Driving V_REF with a DAC
Differential Inputs
The LTC1608 has a unique differential sample-and-hold
circuit that allows rail-to-rail inputs. The ADC will always
convert the difference of A_IN+ – A_IN– independent of the
common mode voltage (see Figure 15a). The common
mode rejection holds up to extremely high frequencies
(see Figure 14a). The only requirement is that both inputs
can not exceed the AV_DD or V_SS power supply voltages.
Integral nonlinearity errors (INL) and differential nonlin-
earity errors (DNL) are independent of the common mode
voltage, however, the bipolar zero error (BZE) will vary.
The change in BZE is typically less than 0.1% of the
common mode voltage. Dynamic performance is also
affected by the common mode voltage. THD will degrade
as the inputs approach either power supply rail, from 96dB
with a common mode of 0V to 86dB with a common mode
of 2.5V or – 2.5V.
80
70
60
50
40
30
20
10
0
1k
10k
100k
INPUT FREQUENCY (Hz)
1M
1608 G14a
Figure 14a. CMRR vs Input Frequency
13