LTC1598_15 Datasheet, PDF (13/24 Pages) Linear Technology – 4- and 8-Channel, Micropower Sampling 12-Bit Serial I/O A/D Converters

LTC1594/LTC1598
APPLICATIONS INFORMATION
Operation with D_IN and D_OUT Tied Together
The LTC1594/LTC1598 can be operated with D_IN and
D_OUT tied together. This eliminates one of the lines
required to communicate to the microprocessor (MPU).
Data is transmitted in both directions on a single wire.
The processor pin connected to this data line should be
configurable as either an input or an output. The LTC1594/
LTC1598 will take control of the data line after CS falling
and before the 6th falling CLK while the processor takes
control of the data line when CS is high (see Figure 3).
Therefore the processor port line must be switched to an
input with CS being low to avoid a conflict.
Separate Chip Selects for MUX and ADC
The LTC1594/LTC1598 provide separate chip selects,
CSMUX and CSADC, to control MUX and ADC separately.
This feature not only provides the flexibility to select a
particular channel once for multiple conversions (see
Figure 4) but also maximizes the sample rate up to
20ksps (see Figure 5).
t_suCS
CS
1
2
3
4
5
6
CLK
DATA (D_IN/D_OUT)
EN
D2
D1
D0
B11
B10
•••
MPU CONTROLS DATA LINE AND SENDS
MUX ADDRESS TO LTC1594/LTC1598
PROCESSOR MUST RELEASE DATA
LINE AFTER CS FALLING AND
BEFORE THE 6TH FALLING CLK
LTC1594/LTC1598 CONTROLS DATA LINE AND SENDS
A/D RESULT BACK TO MPU
LTC1594/LTC1598 TAKES CONTROL OF DATA
LINE AFTER CS FALLING AND BEFORE THE
6TH FALLING CLK
1594/98 F03
Figure 3. LTC1594/LTC1598 Operation with D_IN and D_OUT Tied Together
CSMUX
CSADC
CLK
D_IN
D_OUT
CH0 TO
CH7
ADCIN =
MUXOUT
COM = GND
t_suCS
t_suCS
EN
D1
DON’T CARE
DON’T CARE
D2
D0
D0
NULL
NULL
Hi-Z
BIT
B11 B10 B9
B8
B7
B6
B5
B4
B3 B2
B1 B0
Hi-Z
BIT
B11 B10 B9
B8
B7
B6
B5
B4
B3 B2
B1 B0
Hi-Z
t_SMPL
t_CONV
t_SMPL
t_CONV
t_ON
1594 TD01
Figure 4. Select Certain Channel Once for Mulitple Conversions
15948fb
13