LT1469_1 Datasheet, PDF (13/20 Pages) Linear Technology – Dual 90MHz, 22V/μs 16-Bit Accurate Operational Amplifi er

LT1469
APPLICATIONS INFORMATION
Capacitive Loading
The LT1469 drives capacitive loads of up to 100pF in unity-
gain and 300pF in a gain of –1. When there is a need to
drive a larger capacitive load, a small series resistor should
be inserted between the output and the load. In addition,
a capacitor should be added between the output and the
inverting input as shown in Figure 3.
Settling Time
The LT1469 is a single stage amplifier with an optimal
thermal layout that leads to outstanding settling per-
formance. Measuring settling even at the 12-bit level is
very challenging, and at the 16-bit level requires a great
deal of subtlety and expertise. Fortunately, there are two
excellent Linear Technology reference sources for settling
measurements—Application Notes 47 and 74. Appendix B
of AN47 is a vital primer on 12-bit settling measurements
and AN74 extends the state-of-the-art while concentrating
on settling time with a 16-bit current output DAC input.
The settling of the DAC I-to-V converter on the front page
was measured using the exact methods of AN74. The
optimum nulling of the DAC output capacitance requires
15pF across the 12k feedback resistor. The theoretical limit
for 16-bit settling is 11.1 times this RC time constant or
2μs. The actual settling time is 2.4μs at the output of the
LT1469.
The RC output noise filter adds a slight settling time delay
but reduces the noise bandwidth to 1.6MHz which increases
the output resolution for 16-bit accuracy.
R_G
V_IN
R_F
C_F
–
1/2 LT1469
+
R_O ≥ (1 + R_F/R_G)/(2Č • C_L • 5MHz)
R_F ≥ 10R_O
C_F = (2R_O/R_F)C_L
R_O
V_OUT
C_L
1469 F03
Figure 3. Driving Capacitive Loads
1469fa
13