LTC4056-4.2_15 Datasheet, PDF (12/16 Pages) Linear Technology – Linear Li-Ion Charger with Termination in ThinSOT

LTC4056-4.2
APPLICATIO S I FOR ATIO
however, may add enough series inductance to require a
bypass capacitor of at least 1µF from BAT to ground.
Furthermore, a 4.7µF capacitor with a 0.2Ω to 1Ω series
resistor from BAT to ground is required to keep ripple
voltage low when the battery is disconnected.
High value capacitors with very low ESRs (especially
ceramic) reduce the constant voltage loop phase margin,
possibly resulting in instability. Ceramic capacitors up to
22µF may be used in parallel with a battery, but larger
ceramics should be decoupled with 0.2Ω to 1Ω of series
resistance.
In the constant current mode, the PROG pin is in the
feedback loop, not the battery. Because of the additional
pole created by PROG pin capacitance, any additional
capacitance on this pin must be limited. Although higher
charge current applications (i.e., lower program resis-
tance) can tolerate more PROG capacitance, a good rule of
thumb is to keep the capacitive loading on the PROG pin
to less than 660pF.
If additional capacitance on this pin is required (e.g., to
provide an accurate, filtered low current 1V reference to
external circuitry) a 1k to 10k decoupling resistor may be
needed (see Figure 3).
LTC4056
6
PROG
GND
4
R_PROG
10k
C_FILTER
ACCURATE,
FILTERED 1V
REFERENCE
4056-4.2 F03
Figure 3. Isolating Capacitive Load on PROG Pin and Filtering
Reverse Polarity Input Voltage Protection
In some applications, protection from reverse polarity
voltage on V_CC is desired. If the supply voltage is high
enough, a series blocking diode can be used. In other
cases, where the voltage drop must be kept low, a P-channel
MOSFET can be used (as shown in Figure 4).
*
V_IN
LTC4056
V_CC
4056-4.2 F04
*DRAIN-BULK DIODE OF FET
Figure 4. Low Loss Input Reverse Polarity Protection
V_CC Bypass Capacitor
Many types of capacitors with values ranging from 1µF to
10µF located close to the LTC4056 will provide adequate
input bypassing. However, caution must be exercised
when using multilayer ceramic capacitors. Because of the
self-resonant and high Q characteristics of some types of
ceramic capacitors, high voltage transients can be gener-
ated under some start-up conditions, such as connecting
the charger input to a hot power source. For more informa-
tion refer to Application Note 88.
Internal Protection
Internal protection is provided to prevent excessive PROG
pin currents (I_PSHRT), excessive DRIVE pin currents
(I_DSHRT) and excessive self-heating of the LTC4056 during
a fault condition. The faults can be generated from a
shorted PROG pin, a shorted DRIVE pin or from excessive
DRIVE pin current to the base of the external PNP transis-
tor when it is in deep saturation from a very low V_CE. This
protection is not designed to prevent overheating of the
external pass transistor. However, thermal coupling be-
tween the external PNP and the LTC4056 will allow the
internal thermal limit to deprive the PNP of base current
when the junction temperature of the IC rises above about
135°C. The temperature of the PNP at that point, however,
will be well in excess of 135°C. The exact temperature of
the PNP depends on the thermal coupling between the
LTC4056 and the PNP and on the θ_JA of the transistor. See
the section titled “External PNP Transistor” for informa-
tion on protecting the transistor from overheating.
405642f
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