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LTC3858-1 Datasheet, PDF (12/38 Pages) Linear Technology – Low IQ, Dual 2-Phase Synchronous Step-Down Controller
LTC3858-1
Operation (Refer to the Functional Diagram)
INTVCC
SS VOLTAGE
2V
1.5V
0.8V
LATCH-OFF
COMMAND
0V
SS PIN
CURRENT
1µA
1µA
–9µA
OUTPUT
VOLTAGE
LATCH-OFF
ENABLE
ARMING
SOFT-START INTERVAL
tLATCH
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Figure 1. Latch-Off Timing Diagram
Foldback Current
On the other hand, when the output voltage falls to less
than 70% of its nominal level, foldback current limiting
is also activated, progressively lowering the peak current
limit in proportion to the severity of the overcurrent or
short-circuit condition. Even if a short-circuit is present
and the short-circuit latch-off is not yet enabled (when
SS voltage has not yet reached 2V), a safe, low output
current is provided due to internal current foldback and
actual power wasted is low due to the efficient nature of
the current mode switching regulator. Foldback current
limiting is disabled during the soft-start interval (as long
as the VFB voltage is keeping up with the SS voltage).
Light Load Current Operation (Burst Mode Operation,
Pulse-Skipping or Forced Continuous Conduction)
(PLLIN/MODE Pin)
The LTC3858-1 can be enabled to enter high efficiency
Burst Mode operation, constant frequency pulse-skipping
mode, or forced continuous conduction mode at low load
currents. To select Burst Mode operation, tie the PLLIN/
MODE pin to ground. To select forced continuous opera-
tion, tie the PLLIN/MODE pin to INTVCC. To select pulse-
skipping mode, tie the PLLIN/MODE pin to a DC voltage
greater than 1.2V and less than INTVCC – 1.3V.
When a controller is enabled for Burst Mode operation, the
minimum peak current in the inductor is set to approxi-
mately 30% of the maximum sense voltage even though
the voltage on the ITH pin indicates a lower value. If the
average inductor current is higher than the load current,
the error amplifier, EA, will decrease the voltage on the ITH
pin. When the ITH voltage drops below 0.425V, the internal
sleep signal goes high (enabling “sleep” mode) and both
external MOSFETs are turned off.
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current. If one channel is shut down
and the other channel is in sleep mode, the LTC3858-1
draws only 170µA of quiescent current. If both channels
are in sleep mode, the LTC3858-1 draws only 300µA of qui-
escent current. In sleep mode, the load current is supplied
by the output capacitor. As the output voltage decreases,
the EA’s output begins to rise. When the output voltage
drops enough, the ITH pin is reconnected to the output
of the EA, the sleep signal goes low, and the controller
resumes normal operation by turning on the top external
MOSFET on the next cycle of the internal oscillator.
When a controller is enabled for Burst Mode operation,
the inductor current is not allowed to reverse. The reverse
current comparator, IR, turns off the bottom external
MOSFET just before the inductor current reaches zero,
preventing it from reversing and going negative. Thus,
the controller is in discontinuous operation.
In forced continuous operation or when clocked by an
external clock source to use the phase-locked loop (see
Frequency Selection and Phase-Locked Loop section),
the inductor current is allowed to reverse at light loads
or under large transient conditions. The peak inductor
current is determined by the voltage on the ITH pin, just
as in normal operation. In this mode, the efficiency at light
loads is lower than in Burst Mode operation. However,
continuous operation has the advantages of lower output
voltage ripple and less interference to audio circuitry. In
forced continuous mode, the output ripple is independent
of load current.
When the PLLIN/MODE pin is connected for pulse-skipping
mode, the LTC3858-1 operates in PWM pulse-skipping
mode at light loads. In this mode, constant frequency
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