LTC3726 Datasheet, PDF (12/16 Pages) Linear Technology – Secondary-Side Synchronous Forward Controller

LTC3726
APPLICATIO S I FOR ATIO
one of two reasons: 1) the start-up time-out feature will be
activated since the LTC3726 never sends signals to the
primary side or 2) the primary-side overcurrent circuit will
be tripped because of current buildup in the output induc-
tor. In either case, the LTC3705/LTC3725 will initiate a
shutdown followed by a soft-start retry. See the LTC3705/
LTC3725 data sheets for further details.
Bias Supply Generation
Figure 2 shows a commonly used method of developing a
V_CC bias supply for the LTC3726. During start-up, the
circuit of Figure 2 uses a peak detector followed by a
simple linear regulator to rapidly develop a V_CC voltage for
the LTC3726. Note that this bias voltage must rise faster
than the open-loop soft-start that is initiated by the
LTC3705/LTC3725. This ensures that the LTC3726 be-
gins switching and assumes control of the soft-start
before the output voltage has risen substantially.
The value of R1 should be chosen to keep the peak
charging current below the maximum (non-repetitive peak)
rating of diode D1, but should otherwise be as small as
R1 ^CMPSH1-4
1.2Ω D1
• • _BIAS
C1
WINDING
10µF
1
N_B
25V
R2
5K
Q1
FZT690B
MAIN
TRANSFORMER
PEAK CHARGER
D2
C2
7.5V
1µF
16V
REGULATOR
LTC3726
V_CC
3726 F02
Figure 2. Typical Bias Supply Configuration
possible to provide a rapid charging of capacitor C1. This
capacitor serves as a reservoir to provide bias voltage as
the LTC3726 begins switching and assumes control of the
soft-start from the LTC3705/LTC3725. Care should be
taken to ensure that capacitor C1 is adequately large to
provide enough hold-up time for the LTC3726 to assume
control and establish a firm bias voltage at the main
transformer.
12
The linear regulator of Figure 2 should be designed to
handle the total expected I_CC current. For self-starting
applications with the LTC3705/LTC3725, this regulator
will supply the operating bias current for both primary and
secondary side control circuitry. This current may be
approximated using the following:
I_CC = I_Q,3726 + M_Sf_OSCQ_G,SEC
( ) ^{+2 M}_P^f_OSC^Q_G,PRI ^{+ I}_Q,3705
+I_CORE + 20C_SNUBV_CC f_OSC
where I_Q,3705 and I_Q,3726 are the operating supply currents
of the LTC3705/LTC3725 and LTC3706, M_P and M_S are the
number of power MOSFETs used on the primary and
secondary sides, Q_G,PRI and Q_G,SEC are the total gate
charge of the primary and secondary MOSFETs, I_CORE is
the core loss current associated with the pulse trans-
former, and C_SNUB is the snubber capacitor across the
pulse transformer. Note that the current used by the
primary side circuitry is doubled by the 2:1 turns ratio of
the pulse transformer. For the Typical Application circuit
of Figure 5, the total I_CC delivered by the linear regulator
is 5mA + 3(50nC)(200kHz) + 2(2(38nC)(200kHz) + 2mA)
+ 3mA + 13mA = 85mA. To accommodate this current, Q1
should have a high Beta (>300), and R2 should be chosen
to supply adequate base current at low V_IN (e.g., at 36V on
the converter input), while maintaining a reasonable power
dissipation in D2 at high V_IN (72V).
The turns ratio (N_B) of the bias winding should be chosen
to ensure that there is adequate voltage to operate the
LTC3726 over the entire range for the DC/DC converter’s
input bus voltage (V_BUS). This may be calculated using
N_B
=
V_CC(MIN) + 1.2V +
V_BUS(MIN)
R2 ⋅ I_CC
β_Q1
V_CC(MIN) can be as low as 5V (if this provides adequate
gate drive voltage to maintain acceptable efficiency), or as
high as 7V. For the Figure 2 circuit if V_CC(MIN) = 6V, I_CC =
85mA, and V_BUS = 36V-72V, this would mean a turns ratio
N_B = 0.24, or a 9:2 transformer. Generally, if the output
voltage of the DC/DC converter is 3.3V or higher, then the
main output of the power transformer (tied to SW node on
3726fb