LTC3610EWPPBF Datasheet, PDF (12/24 Pages) Linear Technology – 24V, 12A Monolithic Synchronous Step-Down DC/DC Converter

LTC3610
Applications Information
V_OUT
R_VON1
30k
R_VON2
100k
R_C
C_C
C_VON
0.01µF
V_ON
LTC3610
I_TH
V_OUT
INTV_CC
R_VON1
3k
(2a)
R_VON2
10k 10k
Q1
2N5087
C_VON
0.01µF
R_C
C_C
V_ON
LTC3610
I_TH
3610 F02
(2b)
Figure 2. Correcting Frequency Shift with Load Current Changes
2.0
1.5
DROPOUT
REGION
1.0
0.5
0
0
0.25
0.50
0.75
1.0
DUTY CYCLE (V_OUT/V_IN)
3610 F03
Figure 3. Maximum Switching Frequency vs Duty Cycle
Inductor Selection
Given the desired input and output voltages, the induc-
tor value and operating frequency determine the ripple
current:
ΔI_L
=
⎛
⎜
⎝
V_OUT
fL
⎞
⎟
⎠
⎛
⎝⎜
1−
V_OUT
V_IN
⎞
⎠⎟
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a trade-off between
component size, efficiency and operating frequency.
A reasonable starting point is to choose a ripple current
that is about 40% of I_OUT(MAX). The largest ripple current
occurs at the highest V_IN. To guarantee that ripple current
does not exceed a specified maximum, the inductance
should be chosen according to:
L
=
⎛
⎝⎜
f
V_OUT
ΔI_L(MAX)
⎞
⎠⎟
⎛
⎝⎜ ^1−
V_OUT
V_IN(MAX)
⎞
⎠⎟
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores.
A variety of inductors designed for high current, low volt-
age applications are available from manufacturers such as
Sumida, Panasonic, Coiltronics, Coilcraft and Toko.
C_IN and C_OUT Selection
The input capacitance C_IN is required to filter the square
wave current at the drain of the top MOSFET. Use a low ESR
capacitor sized to handle the maximum RMS current.
I_RMS
≅ I_OUT(MAX)
V_OUT
V_IN
V_{IN – 1}
V_OUT
This formula has a maximum at V_IN = 2V_OUT, where
I_RMS = I_OUT(MAX)/2. This simple worst-case condition is
commonly used for design because even significant de-
viations do not offer much relief. Note that ripple current
ratings from capacitor manufacturers are often based on
only 2000 hours of life which makes it advisable to derate
the capacitor.
The selection of C_OUT is primarily determined by the
ESR required to minimize voltage ripple and load step
transients. The output ripple ΔV_OUT is approximately
bounded by:
ΔV_OUT
≤
ΔI_L
⎛
⎝⎜ ^ESR
+
1
8fC_OUT
⎞
⎠⎟
3610ff
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