LTC3542 Datasheet, PDF (12/16 Pages) Linear Technology – 500mA, 2.25MHz Synchronous Step-Down DC/DC Converter

LTC3542
APPLICATIONS INFORMATION
parallel with C_OUT, causing a rapid drop in V_OUT. No regula-
tor can deliver enough current to prevent this problem, if
the switch connecting the load has low resistance and is
driven quickly. The solution is to limit the turn-on speed of
the load switch driver. A Hot Swap^TM controller is designed
specifically for this purpose and usually incorporates cur-
rent limit, short circuit protection and soft-start.
Design Example
As a design example, assume the LTC3542 is used in a single
lithium-ion battery-powered cellular phone application. The
V_IN will be operating from a maximum of 4.2V down to
about 2.7V. The load current requirement is a maximum
of 0.5A, but most of the time it will be in standby mode,
requiring only 2mA. Efficiency at both low and high load
currents is important. Output voltage is 1.8V.
With this information we can calculate L using:
L
=
f
•
1
ΔI_L
•
V_OUT
•
⎛
⎝⎜ ^1–
V_OUT
V_IN
⎞
⎠⎟
Substituting V_OUT = 1.8V, V_IN = 4.2V, ΔI_L = 200mA and
f = 2.25MHz gives:
L
=
1.8V
2.25MHz • 200mA
•
⎛
⎝⎜
1–
1.8V
4.2V
⎞
⎠⎟
=
2.28μH
Choosing a vendor’s closest inductor value of 2.2μH results
in a maximum ripple current of:
ΔI_L
=
1.8V
2.25MHz • 2.2μH
•
⎛⎝⎜_1–
1.8V⎞
4.2V⎠⎟
=
207.8mA
C_IN will require an RMS current rating of at least
0.25A ≅ I_LOAD(MAX)/2 at temperature and C_OUT will require
ESR of less than 0.2Ω. In most cases, ceramic capacitors
will satisfy these requirements. Select C_OUT = 10μF and
C_IN = 10μF.
For the feedback resistors, choose R1 = 75k, R2 can be
calculated from:
R2
=
⎛
⎝⎜
V_OUT
0.6V
–
1^{⎞⎠⎟}
•
R1=
⎛
⎝⎜
1.8V
0.6V
–
1^{⎞⎠⎟}
•
75k
=
150k
Figure 3 shows the complete circuit along with its efficiency
curve, load step response and recommended layout
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3542. These items are also illustrated graphically
in Figure 3b. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the V_IN trace should be kept short, direct and
wide.
2. Does the V_FB pin connect directly to the feedback re-
sistors? The resistive divider R1/R2 must be connected
between the (+) plate of C_OUT and ground.
3. Does the (+) plate of C_IN connect to V_IN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the (–) plates of C_IN and C_OUT as close as pos-
sible.
5. Keep the switching node, SW, away from the sensitive
V_FB node.
Hot Swap is a trademark of Linear Technology Corporation.
3542fa
12